Intel Arria 10 User Manual page 191

2. Implementing Protocols in Arria 10 Transceivers
UG-01143 | 2018.06.15
Word Bit R/W
Addr
12:8 RW
13 RW
21:16 RW
22 RW
28:24 RW
29 RW
0x4D7
to
0x4FF
Related Information
Reconfiguration Interface and Dynamic Reconfiguration
2.6.4.7.2. Hard Transceiver PHY Registers
Table 146. Hard Transceiver PHY Registers
Addr Bit Access
0x000-0 [9:0] RW
x3FF
Related Information
Reconfiguration Interface and Dynamic Reconfiguration
Name
Override value for the
LT VODMin ovrd
this value substitutes for the
channel override of the device settings. This override only effects
the local device TX output for this channel.
The value to be substituted must be less than the
parameter and greater than the
operation.
When set to 1, enables the override value for the
LT VODMin ovrd
parameter stored in the
Enable
Override value for the
LT VPOST ovrd
value substitutes for the
override of the device settings. This override only effects the local
device TX output for this channel.
The value to be substituted must be greater than the
INITPOSTVAL
When set to 1, enables the override value for the
LT VPOST ovrd
parameter stored in the
Enable
Override value for the
LT VPre ovrd
value substitutes for the
override of the device settings. This override only effects the local
device TX output for this channel.
The value greater than the
operation.
When set to 1, enables the override value for the
LT VPre ovrd Enable
parameter stored in the
Reserved for 40G KR Left empty for address compatibility with 40G MAC+PHY KR
solution.
Name
Access to HSSI All registers in the physical coding sub-layer (PCS) and physical
registers media attachment (PMA) that you can dynamically reconfigure
are in this address space. Refer to the Arria 10 Dynamic
Transceiver Reconfiguration chapter for further information.
Description
parameter. When enabled,
VODMINRULE
to allow channel-by-
VMINRULE
parameter for proper
VMINRULE
register field.
LT VODMin ovrd
parameter. When enabled, this
VPOSTRULE
to allow channel-by-channel
VPOSTRULE
parameter for proper operation.
register field.
LT VPOST ovrd
parameter. When enabled, this
VPRERULE
to allow channel-by-channel
VPOSTRULE
parameter for proper
INITPREVAL
register field.
LT VPre ovrd
on page 502
Description
on page 502
® ®
Intel Arria 10 Transceiver PHY User Guide
INITMAINVAL
VODMINRULE
VPOSTRULE
VPRERULE
191