Texas Instruments SimpleLink CC2620 Technical Reference Manual page 1073

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12.5.1.17 ERROR Register (Offset = 4Ch) [reset = 0h]
ERROR is shown in
Error Status and Clear
31 30
23 22
15 14
7 6
Bit Field
31-1 RESERVED
0 STATUS
SWCU117C – February 2015 – Revised September 2015
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Figure 12-23 and described in
Figure 12-23. ERROR Register
29 28
RESERVED
21 20
RESERVED
13 12
RESERVED
5 4
RESERVED
W-0h
Table 12-24. ERROR Register Field Descriptions
Type Reset
W 0h
R/W 0h
Copyright © 2015, Texas Instruments Incorporated
Table 12-24.
27 26
W-0h
19 18
W-0h
11 10
W-0h
3 2
Description
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
Returns the status of bus error flag in uDMA, or clears this bit
Read as:
0: No bus error detected
1: Bus error detected
Write as:
0: No effect, status of bus error flag is unchanged.
1: Clears the bus error flag.
Micro Direct Memory Access (µDMA)
µDMA Registers
25 24
17 16
9 8
1 0
STATUS
R/W-0h
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