Tim1 And Tim8 Register Map; Table 58. Tim1 And Tim8 Register Map And Reset Values - ST STM32F205 series Reference Manual

Advanced-control timers (TIM1 and TIM8)
13.4.21

TIM1 and TIM8 register map

TIM1 and TIM8 registers are mapped as 16-bit addressable registers as described in the
table below:
Offset Register
TIMx_CR1
0x00
Reset value
TIMx_CR2
0x04
Reset value
TIMx_SMCR
0x08
Reset value
TIMx_DIER
0x0C
Reset value
TIMx_SR
0x10
Reset value
TIMx_EGR
0x14
Reset value
TIMx_CCMR1
Output
Compare mode
Reset value
0x18
TIMx_CCMR1
Input Capture
mode
Reset value
TIMx_CCMR2
Output
Compare mode
Reset value
0x1C
TIMx_CCMR2
Input Capture
mode
Reset value
TIMx_CCER
0x20
Reset value
TIMx_CNT
0x24
Reset value
TIMx_PSC
0x28
Reset value
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Table 58. TIM1 and TIM8 register map and reset values

Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
0
0 0
0
Reserved
OC2M
0 0
IC2F[3:0]
0 0
OC4M
0 0
IC4F[3:0]
0 0
0 0
0 0
RM0033 Rev 8
CKD CMS
[1:0] [1:0]
0 0 0 0
MMS[2:0]
0 0 0 0 0 0 0 0
ETP
S ETF[3:0] TS[2:0]
[1:0]
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0
0 0
CC2S OC1M
[2:0] [1:0]
0 0 0 0 0 0 0 0
IC2
CC2S
PSC IC1F[3:0]
[1:0]
[1:0]
0 0 0 0 0 0 0 0
CC4S OC3M
[2:0] [1:0]
0 0 0 0 0 0 0 0
IC4
CC4S
PSC IC3F[3:0]
[1:0]
[1:0]
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
CNT[15:0]
0 0 0 0 0 0 0 0
PSC[15:0]
0 0 0 0 0 0 0 0
RM0033
0 0 0 0 0 0
0 0 0 0 0
SMS[2:0]
0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
CC1
S
[2:0]
[1:0]
0 0 0 0 0 0
IC1 CC1
PSC S
[1:0] [1:0]
0 0 0 0 0 0
CC3
S
[2:0]
[1:0]
0 0 0 0 0 0
IC3 CC3
PSC S
[1:0] [1:0]
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0