18.5.14 USARTn_TXDATA - TX Buffer Data Register
Offset
0x034
Reset
Access
Name
Bit
Name
31:8
Reserved
7:0
TXDATA
This frame will be added to TX buffer. Only 8 LSB can be written using this register. 9th bit and control bits will be cleared.
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USART - Universal Synchronous Asynchronous Receiver/Transmitter
Reset
Access
Description
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0x00
W
TX Data
Bit Position
Reference Manual
1.2 Conven-
Rev. 1.1 | 579
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