Silicon Laboratories EFR32xG14 Wireless Gecko Reference Manual page 482

17.3.1.2 Bus Transfer
When a master wants to initiate a transfer on the bus, it waits until the bus is idle and transmits a START condition on the bus. The
master then transmits the address of the slave it wishes to interact with and a single R/W bit telling whether it wishes to read from the
slave (R/W bit set to 1) or write to the slave (R/W bit set to 0).
After the 7-bit address and the R/W bit, the master releases the bus, allowing the slave to acknowledge the request. During the next bit-
period, the slave pulls SDA low (ACK) if it acknowledges the request, or keeps it high if it does not acknowledge it (NACK).
Following the address acknowledge, either the slave or master transmits data, depending on the value of the R/W bit. After every 8 bits
(one byte) transmitted on the SDA line, the transmitter releases the line to allow the receiver to transmit an ACK or a NACK. Both the
data and the address are transmitted with the most significant bit first.
The number of bytes in a bus transfer is unrestricted. The master ends the transmission after a (N)ACK by sending a STOP condition
on the bus. After a STOP condition, any master wishing to initiate a transfer on the bus can try to gain control of it. If the current master
wishes to make another transfer immediately after the current, it can start a new transfer directly by transmitting a repeated START
condition (Sr) instead of a STOP followed by a START.
2
Examples of I C transfers are shown in
from Slave on page 482, and
ers used are:
• ADDR - Address
• DATA - Data
• S - Start bit
• Sr - Repeated start bit
• P - Stop bit
• W/R - Read(1)/Write(0)
• A - ACK
• N - NACK
S
S ADDR
Figure 17.8. I2C Single Byte Write, then Repeated Start and Single Byte Read
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Figure 17.6 I2C Single Byte Write to Slave on page
Figure 17.8 I2C Single Byte Write, then Repeated Start and Single Byte Read on page
S ADDR
Figure 17.6. I2C Single Byte Write to Slave
ADDR R A
Figure 17.7. I2C Double Byte Read from Slave
W A DATA
W A DATA
DATA A
A Sr ADDR
Reference Manual
I2C - Inter-Integrated Circuit Interface
482, Figure 17.7 I2C Double Byte Read
482. The identifi-
A P
DATA N P
R A DATA
Rev. 1.1 | 482
N P