Silicon Laboratories EFR32xG14 Wireless Gecko Reference Manual page 925

Bit Name
17 Reserved
16 APORTOUTENPRS
Enable PRS Control of the IDAC APORT output enable.
Value
0
1
15 Reserved
14 APORTMASTERDIS
Determines if the IDAC will request the APORT bus selected by APORTOUTSEL. This bit allows multiple APORT connec-
ted devices to monitor the same APORT bus simultaneously by allowing the IDAC to not master the selected bus. When 1,
the determination is expected to be from another peripheral, and the IDAC only passively looks at the bus. When 1, the
selection of channel for a selected bus is ignored (the bus is not), and will be whatever selection the external device mas-
tering the bus has configured for the APORT bus.
Value
0
1
13 EM2DELAY
Delays EM2 entry until the IDAC output is stable
12 PWRSEL
Selects the power source for the IDAC
Mode
ANA
IO
11:4 APORTOUTSEL
Select output mode.
APORT1XCH0
APORT1YCH1
APORT1XCH2
APORT1YCH3
APORT1XCH4
APORT1YCH5
. . .
APORT1XCH30
APORT1YCH31
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Reset Access Description
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0 RW PRS Controlled APORT Output Enable
Description
APORT output enable controlled by IDAC_APORTOUTEN.
APORT output enable controlled by PRS channel selected by
PRSSEL.
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0 RW APORT Bus Master Disable
Description
Bus mastering enabled
Bus mastering disabled
0 RW EM2 Delay
0 RW Power Select
Value Description
0 VDDX_ANA
1 IOVDD
0x00 RW APORT Output Select
0x20 APORT1X Channel 0
0x21 APORT1Y Channel 1
0x22 APORT1X Channel 2
0x23 APORT1Y Channel 3
0x24 APORT1X Channel 4
0x25 APORT1Y Channel 5
. . . . . .
0x3e APORT1X Channel 30
0x3f APORT1Y Channel 31
IDAC - Current Digital to Analog Converter
Reference Manual
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