Channel Descriptor Data Structure - Silicon Laboratories EFR32xG14 Wireless Gecko Reference Manual

8.3.7 Channel Descriptor Data Structure

Each channel descriptor consists of four 32-bit words:
• CTRL - control word contains information like transfer count and block size.
• SRC - source address points to where to copy data from
• DST - destination address points to where to copy data to
• LINK - link address points to where to load the next linked descriptor
These words map directly to the LDMA_CHx_CTRL, LDMA_CHx_SRC, LDMA_CHx_DST, and LDMA_CHx_LINK registers. The usage
of the SRC and DST fields may differ depending on the structure type
There are three different types of descriptor data structures: XFER, SYNC, and WRI
8.3.7.1 XFER Descriptor Structure
This descriptor defines a typical data transfer which may be a Normal, Link, or Loop transfer.
Only this structure type can be written directly into LDMA's registers by the CPU. All descriptors may be linked to. Refer to the register
descriptions for additional information.
For specifying XFER structure type, set STRUCTTYPE to 0. See the peripheral register descriptions for information on the fields in this
structure.
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Bit Position
SRCADDR
DSTADDR
LINKADDR
Reference Manual
LDMA - Linked DMA Controller
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