Rtcc_Precnt - Pre-Counter Value Register (Async Reg); Rtcc_Cnt - Counter Value Register (Async Reg) - Silicon Laboratories EFR32xG14 Wireless Gecko Reference Manual

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13.5.2 RTCC_PRECNT - Pre-Counter Value Register (Async Reg)

For more information about asynchronous registers see
Offset
0x004
Reset
Access
Name
Bit
Name
31:15
Reserved
14:0
PRECNT
Gives access to the Pre-counter value of the RTCC.

13.5.3 RTCC_CNT - Counter Value Register (Async Reg)

For more information about asynchronous registers see
Offset
0x008
Reset
Access
Name
Bit
Name
31:0
CNT
Gives access to the main counter value of the RTCC. Register can not be written and will be read as zero when
RTCC_CTRL_CNTMODE = CALENDAR.
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4.3 Access to Low Energy Peripherals (Asynchronous
Reset
Access
Description
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0x0000
RWH
Pre-Counter Value
4.3 Access to Low Energy Peripherals (Asynchronous
Reset
Access
Description
0x00000000
RWH
Counter Value
RTCC - Real Time Counter and Calendar
Bit Position
Bit Position
Reference Manual
Registers).
1.2 Conven-
Registers).
Rev. 1.1 | 389

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