Letimern_Ien - Interrupt Enable Register; Letimern_Syncbusy - Synchronization Busy Register - Silicon Laboratories EFR32xG14 Wireless Gecko Reference Manual

21.5.12 LETIMERn_IEN - Interrupt Enable Register

Offset
0x02C
Reset
Access
Name
Bit Name
31:5 Reserved
4 REP1
Enable/disable the REP1 interrupt
3 REP0
Enable/disable the REP0 interrupt
2 UF
Enable/disable the UF interrupt
1 COMP1
Enable/disable the COMP1 interrupt
0 COMP0
Enable/disable the COMP0 interrupt

21.5.13 LETIMERn_SYNCBUSY - Synchronization Busy Register

Offset
0x034
Reset
Access
Name
Bit Name
31:2 Reserved
1 CMD
Set when the value written to CMD is being synchronized.
0 Reserved
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Reset Access Description
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0 RW REP1 Interrupt Enable
0 RW REP0 Interrupt Enable
0 RW UF Interrupt Enable
0 RW COMP1 Interrupt Enable
0 RW COMP0 Interrupt Enable
Reset Access Description
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0 R CMD Register Busy
To ensure compatibility with future devices, always write bits to 0. More information in
tions
Bit Position
Bit Position
Reference Manual
LETIMER - Low Energy Timer
1.2 Conven-
1.2 Conven-
1.2 Conven-
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