Vdacn_Ch1Data - Channel 1 Data Register - Silicon Laboratories EFR32xG14 Wireless Gecko Reference Manual

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23.5.11 VDACn_CH1DATA - Channel 1 Data Register

Offset
0x028
Reset
Access
Name
Bit
Name
31:12
Reserved
11:0
DATA
This register contains the value which will be converted by DAC channel 1.
23.5.12 VDACn_COMBDATA - Combined Data Register
Offset
0x02C
Reset
Access
Name
Bit
Name
31:28
Reserved
27:16
CH1DATA
Data written to this register will be written to DATA in VDACn_CH1DATA.
15:12
Reserved
11:0
CH0DATA
Data written to this register will be written to DATA in VDACn_CH0DATA.
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Reset
Access
Description
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0x800
RWH
Channel 1 Data
Reset
Access
Description
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0x800
W
Channel 1 Data
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0x800
W
Channel 0 Data
Bit Position
Bit Position
Reference Manual
VDAC - Digital to Analog Converter
1.2 Conven-
1.2 Conven-
1.2 Conven-
Rev. 1.1 | 782

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