Leuartn_Pulsectrl - Pulse Control Register (Async Reg) - Silicon Laboratories EFR32xG14 Wireless Gecko Reference Manual

19.5.16 LEUARTn_PULSECTRL - Pulse Control Register (Async Reg)

For more information about asynchronous registers see
Offset
0x03C
Reset
Access
Name
Bit Name
31:6 Reserved
5 PULSEFILT
Enable a one-cycle pulse filter for pulse extender
Value
0
1
4 PULSEEN
Filter LEUART output through pulse generator and the LEUART input through the pulse extender.
3:0 PULSEW
Configure the pulse width of the pulse generator as a number of 32.768 kHz clock cycles.
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LEUART - Low Energy Universal Asynchronous Receiver/Transmitter
4.3 Access to Low Energy Peripherals (Asynchronous
Reset Access Description
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0 RW Pulse Filter
Description
Filter is disabled. Pulses must be at least 2 cycles long for reliable de-
tection.
Filter is enabled. Pulses must be at least 3 cycles long for reliable de-
tection.
0 RW Pulse Generator/Extender Enable
0x0 RW Pulse Width
Bit Position
Reference Manual
Registers).
1.2 Conven-
Rev. 1.1 | 643