Timern_Status - Status Register - Silicon Laboratories EFR32xG14 Wireless Gecko Reference Manual

20.5.3 TIMERn_STATUS - Status Register

Offset
0x008
Reset
Access
Name
Bit Name
31:28 Reserved
27 CCPOL3
In Input Capture mode, this bit indicates the polarity of the edge that triggered capture in TIMERn_CC3_CCV. In
Compare/PWM mode, this bit indicates the polarity of the selected input to CC channel 3. These bits are cleared when
CCMODE is written to 0b00 (Off).
Value
0
1
26 CCPOL2
In Input Capture mode, this bit indicates the polarity of the edge that triggered capture in TIMERn_CC2_CCV. In
Compare/PWM mode, this bit indicates the polarity of the selected input to CC channel 2. These bits are cleared when
CCMODE is written to 0b00 (Off).
Value
0
1
25 CCPOL1
In Input Capture mode, this bit indicates the polarity of the edge that triggered capture in TIMERn_CC1_CCV. In
Compare/PWM mode, this bit indicates the polarity of the selected input to CC channel 1. These bits are cleared when
CCMODE is written to 0b00 (Off).
Value
0
1
24 CCPOL0
In Input Capture mode, this bit indicates the polarity of the edge that triggered capture in TIMERn_CC0_CCV. In
Compare/PWM mode, this bit indicates the polarity of the selected input to CC channel 0. These bits are cleared when
CCMODE is written to 0b00 (Off).
Value
0
1
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Reset Access Description
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0 R CC3 Polarity
Mode Description
LOWRISE CC3 polarity low level/rising edge
HIGHFALL CC3 polarity high level/falling edge
0 R CC2 Polarity
Mode Description
LOWRISE CC2 polarity low level/rising edge
HIGHFALL CC2 polarity high level/falling edge
0 R CC1 Polarity
Mode Description
LOWRISE CC1 polarity low level/rising edge
HIGHFALL CC1 polarity high level/falling edge
0 R CC0 Polarity
Mode Description
LOWRISE CC0 polarity low level/rising edge
HIGHFALL CC0 polarity high level/falling edge
Bit Position
Reference Manual
TIMER/WTIMER - Timer/Counter
1.2 Conven-
Rev. 1.1 | 679