Smu_Ifc - Interrupt Flag Clear Register; Smu_Ien - Interrupt Enable Register - Silicon Laboratories EFR32xG14 Wireless Gecko Reference Manual

12.5.3 SMU_IFC - Interrupt Flag Clear Register

Offset
0x014
Reset
Access
Name
Bit Name
31:1 Reserved
0 PPUPRIV
Write 1 to clear the PPUPRIV interrupt flag. Reading returns the value of the IF and clears the corresponding interrupt flags
(This feature must be enabled globally in MSC.).

12.5.4 SMU_IEN - Interrupt Enable Register

Offset
0x018
Reset
Access
Name
Bit Name
31:1 Reserved
0 PPUPRIV
Enable/disable the PPUPRIV interrupt
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Reset Access Description
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0 (R)W1 Clear PPUPRIV Interrupt Flag
Reset Access Description
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0 RW PPUPRIV Interrupt Enable
Bit Position
Bit Position
Reference Manual
SMU - Security Management Unit
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