Voltage Monitor (Vmon) - Silicon Laboratories EFR32xG14 Wireless Gecko Reference Manual

10.3.12 Voltage Monitor (VMON)

The EFR32 features an extremely low energy Voltage Monitor (VMON) capable of running down to EM4 Hibernate. Trigger points are
preloaded but may be reconfigured.
• AVDD X 2
• DVDD
• IOVDD0
Feature
Hysteresis (separate rise and fall triggers)
Interrupt
Wake-Up from EM4 Hibernate
The status of the VMON is reflected in the EMU_STATUS register.
The status of the sticky interrupt can be found at EMU_IF. These interrupt flags also serve as the wake-up source of EM4H when the
associated RISEWU and FALLWU bits are set. This means that if these flags are set, EM4H entry will result in an immediate wake-up.
To prevent this, these must be cleared by software before EM4H entry.
Note that the VMON has offset high hysteresis, specified in the device Data Sheet. For rising edge detection the threshold will be the
threshold setting (as described below) + V
VMON channels are calibrated at two voltages: 1.86 V and 2.98 V. The calibration results (coarse thresholds and fine thresholds for
1.86 V and 2.98 V) are placed in the VMONCAL registers in the DI page. Using these thresholds it is possible to calculate thresholds for
the entire supported VMON VDD range, i.e., 1.62 V to 3.4 V. Using the values given in VMONCAL registers, one can calculate T
T , V and V .
2.98 a b
T = (10 x VMONCALX_XVDD1V86THRESCOARSE) + VMONCALX_XVDD1V86THRESFINE,
1.86
T = (10 x VMONCALX_XVDD2V98THRESCOARSE) + VMONCALX_XVDD2V98THRESFINE,
2.98
Now if it is required to find the coarse and fine thresholds for a certain voltage Y, following equation can be used:
Thres should be rounded to the nearest integer. The least significant digit of the rounded Thres
Y
ing digits give the coarse threshold for Y. These can now be programmed in the relevant EMU_VMONXVDDCTRL register as the
coarse and fine thresholds. It may not be possible to set threshold exactly for Y. In that case the closest possible voltage is used. Y
gives the value of this closest possible voltage.
Consider the example where it is required to set the AVDD rise threshold to 2.2 V (so Y=2.2 V). This means that the EMU_VMO-
NAVDDCTRL_RISETHRESCOARSE and EMU_VMONAVDDCTRL_RISETHRESFINE need to be programmed. Here are the steps
that should be followed:
• Check VMONCAL0 register. It has the VMON AVDD channel calibrated thresholds for 1.86 V and 2.98 V. Lets assume that the fol-
lowing values are present in the associated bitfields:
• AVDD1V86THRESCOARSE = 3
• AVDD1V86THRESFINE = 5
• AVDD2V98THRESCOARSE = 8
• AVDD2V98THRESFINE = 7
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Table 10.6. VMON Events
Condition AVDD
- Yes
Fall or Rise Yes
Fall or Rise Yes
, and for falling edge detection the threshold will simply be the threshold setting.
VMON_HST
V = (1.12) / (T
a 2.98
V = 1.86 - (V
b a
Figure 10.6. VMON Calibration Equations
Thres = (Y - V
Y
Y = (Thres x V
calib Y
Figure 10.7. VMON Threshold Equations
EMU - Energy Management Unit
DVDD
-
Yes
Yes
- T ),
1.86
x T ),
1.86
) / V ,
b a
) + V ,
a b
gives the fine threshold and remain-
Y
Reference Manual
IOVDD
-
Yes
Yes
,
1.86
calib
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