Functional Description; Timer; Compare Registers - Silicon Laboratories EFR32xG14 Wireless Gecko Reference Manual

21.3 Functional Description

An overview of the LETIMER module is shown in
ter with two compare registers, LETIMERn_COMP0 and LETIMERn_COMP1. The LETIMERn_COMP0 register can optionally act as a
top value for the counter. The repeat counter LETIMERn_REP0 allows the timer to count a specified number of times before it stops.
Both the LETIMERn_COMP0 and LETIMERn_REP0 registers can be double buffered by the LETIMERn_COMP1 and LETI-
MERn_REP1 registers to allow continuous operation. The timer can generate a single pin output, or two linked outputs.
PRS event
SW
LFACLK
LETIMERn
PRS event

21.3.1 Timer

The timer is started by setting command bit START in LETIMERn_CMD, and stopped by setting the STOP command bit in the same
register. RUNNING in LETIMERn_STATUS is set as long as the timer is running. The timer can also be started on external signals,
such as a compare match from the Real Time Counter. If START and STOP are set at the same time, STOP has priority, and the timer
will be stopped.
The timer value can be read using the LETIMERn_CNT register. The value can be written, and it can also be cleared by setting the
CLEAR command bit in LETIMERn_CMD. If the CLEAR and START commands are issued at the same time, the timer will be cleared,
then start counting at the top value.

21.3.2 Compare Registers

The LETIMER has two compare match registers, LETIMERn_COMP0 and LETIMERn_COMP1. Each of these compare registers are
capable of generating an interrupt when the counter value LETIMERn_CNT becomes equal to their value. When LETIMERn_CNT be-
comes equal to the value of LETIMERn_COMP0, the interrupt flag COMP0 in LETIMERn_IF is set, and when LETIMERn_CNT be-
comes equal to the value of LETIMERn_COMP1, the interrupt flag COMP1 in LETIMERn_IF is set.
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Figure 21.1 LETIMER Overview on page
LETIMER Control
and Status
COMP1
(Top Buffer)
Top load
logic
Update
COMP0
(Top)
Reload
Start
CNT (Counter)
Clear
Stop
REP0
(Repeat)
Update
Buffer
Repeat
Written
load logic
REP1
(Repeat Buffer)
Figure 21.1. LETIMER Overview
715. The LETIMER is a 16-bit down-coun-
=
=
Underflow
(UF interrupt flag)
Pulse
= 0
Control
PRS event
Pulse
Control
REP0 Zero
(REP0 interrupt flag)
=1
=1
Reference Manual
LETIMER - Low Energy Timer
COMP1 Match
(COMP1 interrupt flag)
COMP0 Match
(COMP0 interrupt flag)
PRS CH0
pin
LETn_O0
ctrl
pin
LETn_O1
ctrl
PRS CH1
REP1 Zero
(REP1 interrupt flag)
Rev. 1.1 | 715