Vdacn_Ch0Data - Channel 0 Data Register - Silicon Laboratories EFR32xG14 Wireless Gecko Reference Manual

Bit Name
6 CH0BL
Enable/disable the CH0BL interrupt
5 CH1UF
Enable/disable the CH1UF interrupt
4 CH0UF
Enable/disable the CH0UF interrupt
3 CH1OF
Enable/disable the CH1OF interrupt
2 CH0OF
Enable/disable the CH0OF interrupt
1 CH1CD
Enable/disable the CH1CD interrupt
0 CH0CD
Enable/disable the CH0CD interrupt

23.5.10 VDACn_CH0DATA - Channel 0 Data Register

Offset
0x024
Reset
Access
Name
Bit Name
31:12 Reserved
11:0 DATA
This register contains the value which will be converted by DAC channel 0.
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Reset Access Description
0 RW CH0BL Interrupt Enable
0 RW CH1UF Interrupt Enable
0 RW CH0UF Interrupt Enable
0 RW CH1OF Interrupt Enable
0 RW CH0OF Interrupt Enable
0 RW CH1CD Interrupt Enable
0 RW CH0CD Interrupt Enable
Reset Access Description
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0x800 RWH Channel 0 Data
Bit Position
Reference Manual
VDAC - Digital to Analog Converter
1.2 Conven-
Rev. 1.1 | 781