Register Description - Silicon Laboratories EFR32xG14 Wireless Gecko Reference Manual

30.5 Register Description

30.5.1 TRNGn_CONTROL - Main Control Register
Offset
0x000
Reset
Access
Name
Bit Name
31:14 Reserved
13 BYPAIS31
Bypass for AIS31 startup test.
Value
0
1
12 BYPNIST
Bypass for NIST-800-90B startup test.
Value
0
1
11 FORCERUN
Set this bit to force oscillators to run even when FIFO is full.
Value
0
1
10 ALMIEN
Enable/disable AIS31 noise alarm interrupt.
9 PREIEN
Enable/disable AIS31 preliminary noise alarm interrupt.
8 SOFTRESET
Set to reset the module. This bit is not cleared automatically.
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Reset Access Description
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0 RW AIS31 Start-up Test Bypass.
Mode Description
NORMAL AIS31 startup test is applied. No data will be written to the FIFO until
the test passes.
BYPASS AIS31 startup test is bypassed.
0 RW NIST Start-up Test Bypass.
Mode Description
NORMAL NIST-800-90B startup test is applied. No data will be written to the
FIFO until the test passes.
BYPASS NIST-800-90B startup test is bypassed.
0 RW Oscillator Force Run
Mode Description
NORMAL Oscillators will shut down when FIFO is full
RUN Oscillators will continue to run even after FIFO is full
0 RW Interrupt enable for AIS31 noise alarm
0 RW Interrupt enable for AIS31 preliminary noise alarm
0 RW Software Reset
TRNG - True Random Number Generator
Bit Position
Reference Manual
1.2 Conven-
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