10.5.31 EMU_DCDCLPEM01CFG - Configuration Bits for Low Power Mode to Be Applied During EM01, This Field is Only Rel-
evant If LP Mode is Used in EM01
Offset
0x0EC
Reset
Access
Name
Bit
Name
31:16
Reserved
15:12
LPCMPHYSSE-
LEM01
LP mode hysteresis voltage in at the output is 4*(1+LPATT)*LPCMPHYSSEL*3.13mV. Customers should use the emlib
functions for configuring this field.
11:10
Reserved
9:8
LPCMPBIASEM01
Reserved for internal use. Do not change.
Value
0
1
2
3
7:0
Reserved
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Reset
Access
Description
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0x0
RW
LP Mode Hysteresis Selection for EM01
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0x3
RW
LP Mode Comparator Bias Selection for EM01
Mode
Description
BIAS0
Maximum load current less than 75uA.
BIAS1
Maximum load current less than 500uA.
BIAS2
Maximum load current less than 2.5mA.
BIAS3
Maximum load current less than 10mA.
To ensure compatibility with future devices, always write bits to 0. More information in
tions
Bit Position
Reference Manual
EMU - Energy Management Unit
1.2 Conven-
1.2 Conven-
1.2 Conven-
Rev. 1.1 | 272
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