15.5.6 PRS_ROUTELOC2 - I/O Routing Location Register
Offset
0x018
Reset
Access
Name
Bit
Name
31:30
Reserved
29:24
CH11LOC
Decides the location of the channel I/O pin
Value
0
1
2
3
4
5
23:22
Reserved
21:16
CH10LOC
Decides the location of the channel I/O pin
Value
0
1
2
3
4
5
15:14
Reserved
13:8
CH9LOC
Decides the location of the channel I/O pin
Value
0
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Reset
Access
Description
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0x00
RW
I/O Location
Mode
Description
LOC0
Location 0
LOC1
Location 1
LOC2
Location 2
LOC3
Location 3
LOC4
Location 4
LOC5
Location 5
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0x00
RW
I/O Location
Mode
Description
LOC0
Location 0
LOC1
Location 1
LOC2
Location 2
LOC3
Location 3
LOC4
Location 4
LOC5
Location 5
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0x00
RW
I/O Location
Mode
Description
LOC0
Location 0
Bit Position
Reference Manual
PRS - Peripheral Reflex System
1.2 Conven-
1.2 Conven-
1.2 Conven-
Rev. 1.1 | 434
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