17.3.7.2 Interactions
2
Whenever the I
C module is waiting for interaction from software, it holds the bus clock SCL low, freezing all bus activities, and the
BUSHOLD interrupt flag in I2Cn_IF is set. The action(s) required by software depends on the current state the of the I
state can be read from the I2Cn_STATE register.
As an example,
Table 17.3 I2C Master Transmitter on page 491
Master Transmitter, i.e., a master that transmits data to a slave. As seen in the table, when a start condition has been transmitted, a
requirement is that there is an address and an R/W bit in the transmit buffer. If the transmit buffer is empty, then the BUSHOLD interrupt
flag is set, and the bus is held until data becomes available in the buffer. While waiting for the address, I2Cn_STATE has a value 0x57,
which can be used to identify exactly what the I
Note:
The bus would never stop at state 0x57 if the address was available in the transmit buffer.
The different interactions used by the I
2
tized order. If the I
C module is in such a state that multiple courses of action are possible, then the action chosen is the one that has
the highest priority. For example, after sending out a START, if an address is present in the buffer and a STOP is also pending, then the
2
I
C will send out the STOP since it has the higher priority.
Interaction
STOP*
ABORT
CONT*
NACK*
ACK*
ADDR+W -> TXDATA
ADDR+R -> TXDATA
START*
TXDATA/ TXDOUBLE
RXDATA/ RXDOUBLE
None
The commands marked with a * in
required. When such a command is issued before it can be used/consumed by the I
which can be read from the STATUS register. A pending START command can for instance be identified by PSTART having a high
value.
2
Whenever the I
C module requires an interaction, it checks the pending commands. If one or a combination of these can fulfill an inter-
action, they are consumed by the module and the transmission continues without setting the BUSHOLD interrupt flag in I2Cn_IF to get
an interaction from software. The pending status of a command goes low when it is consumed.
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2
C module is waiting for.
2
C module are listed in
Table 17.2 I2C Interactions in Prioritized Order on page 489
Table 17.2. I2C Interactions in Prioritized Order
Priority
1
2
3
4
5
6
7
8
9
10
11
Table 17.2 I2C Interactions in Prioritized Order on page 489
I2C - Inter-Integrated Circuit Interface
shows the different states the I
Software action
Set the STOP command bit in
I2Cn_CMD
Set the ABORT command bit in
I2Cn_CMD
Set the CONT command bit in
I2Cn_CMD
Set the NACK command bit in
I2Cn_CMD
Set the ACK command bit in
I2Cn_CMD
Write an address to the transmit
buffer with the R/W bit set
Write an address to the transmit
buffer with the R/W bit cleared
Set the START command bit in
I2Cn_CMD
Write data to the transmit buffer Data is available in transmit buf-
Read data from receive buffer
No interaction is required
2
C module, the command is set in a pending state,
Reference Manual
2
C module. This
2
C goes through when operating as a
in a priori-
Automatically continues if
PSTOP is set (STOP pending)
in I2Cn_STATUS
Never, the transmission is abor-
ted
PCONT is set in I2Cn_STATUS
(CONT pending)
PNACK is set in I2Cn_STATUS
(NACK pending)
AUTOACK is set in I2Cn_CTRL
or PACK is set in I2Cn_STATUS
(ACK pending)
Address is available in transmit
buffer with R/W bit set
Address is available in transmit
buffer with R/W bit cleared
PSTART is set in I2Cn_STATUS
(START pending)
fer
Space is available in receive
buffer
can be issued before an interaction is
Rev. 1.1 | 489
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