Vdacn_Cal - Calibration Register - Silicon Laboratories EFR32xG14 Wireless Gecko Reference Manual

23.5.13 VDACn_CAL - Calibration Register

Offset
0x030
Reset
Access
Name
Bit Name
31:20 Reserved
19:16 GAINERRTRIMCH1
This register contains the fine gain error trim for CH1. Program with Device Information value found in DEVIN-
FO_VDACnCH1CAL depending on chosen reference.
15:14 Reserved
13:8 GAINERRTRIM
This register contains the fine gain error trim for CH0 and coarse gain error trim for CH1. Program with Device Information
value found in DEVINFO_VDACnMAINCAL or DEVINFO_VDACnALTCAL depending on chosen reference and choice of
main versus alternative output usage.
7:3 Reserved
2:0 OFFSETTRIM
This register contains the DAC input buffer offset calibration value. Program with Device Information value found in DDE-
VINFO_VDACnCH1CAL.
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Reset Access Description
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0x8 RW Gain Error Trim Value for CH1
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0x20 RW Gain Error Trim Value
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0x4 RW Input Buffer Offset Calibration Value
Bit Position
Reference Manual
VDAC - Digital to Analog Converter
1.2 Conven-
1.2 Conven-
1.2 Conven-
Rev. 1.1 | 783