Adcn_Aportmasterdis - Aport Bus Master Disable Register - Silicon Laboratories EFR32xG14 Wireless Gecko Reference Manual

26.5.30 ADCn_APORTMASTERDIS - APORT Bus Master Disable Register

Offset
0x094
Reset
Access
Name
Bit Name
31:10 Reserved
9 APORT4YMASTER-
DIS
Determines if the ADC will request this APORT bus (if selected by POSSEL or NEGSEL or SCANINPUTSEL). When 1,
ADC only passively monitors the APORT bus and the selection of the channel for the selected bus is ignored. The channel
selection is done by the device that masters the APORT bus. This bit allows multiple APORT connected devices to monitor
the same APORT bus simultaneously.
Value
0
1
8 APORT4XMASTER-
DIS
Determines if the ADC will request this APORT bus (if selected by POSSEL or NEGSEL or SCANINPUTSEL). When 1,
ADC only passively monitors the APORT bus and the selection of the channel for the selected bus is ignored. The channel
selection is done by the device that masters the APORT bus. This bit allows multiple APORT connected devices to monitor
the same APORT bus simultaneously.
Value
0
1
7 APORT3YMASTER-
DIS
Determines if the ADC will request this APORT bus (if selected by POSSEL or NEGSEL or SCANINPUTSEL). When 1,
ADC only passively monitors the APORT bus and the selection of the channel for the selected bus is ignored. The channel
selection is done by the device that masters the APORT bus. This bit allows multiple APORT connected devices to monitor
the same APORT bus simultaneously.
Value
0
1
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Reset Access Description
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0 RW APORT4Y Master Disable
Description
APORT mastering enabled
APORT mastering disabled
0 RW APORT4X Master Disable
Description
APORT mastering enabled
APORT mastering disabled
0 RW APORT3Y Master Disable
Description
APORT mastering enabled
APORT mastering disabled
Bit Position
Reference Manual
ADC - Analog to Digital Converter
1.2 Conven-
Rev. 1.1 | 917