Vdacn_Status - Status Register - Silicon Laboratories EFR32xG14 Wireless Gecko Reference Manual

23.5.2 VDACn_STATUS - Status Register

Offset
0x004
Reset
Access
Name
Bit Name
31:30 Reserved
29 OPA1OUTVALID
OPA1 output is settled externally at the load. In PRS triggered mode this status flag is not used (and remains 0).
28 OPA0OUTVALID
OPA0 output is settled externally at the load. In PRS triggered mode this status flag is not used (and remains 0).
27:26 Reserved
25 OPA1WARM
OPA1 is warm and output is enabled. In PRS triggered mode this status flag is not used (and remains 0).
24 OPA0WARM
OPA0 is warm and output is enabled. In PRS triggered mode this status flag is not used (and remains 0).
23:22 Reserved
21 OPA1ENS
This bit is set when OPA1 is enabled
20 OPA0ENS
This bit is set when OPA0 is enabled
19:18 Reserved
17 OPA1APORTCON-
FLICT
1 if any of the APORTs being requested by the OPA1 are also being requested by another peripheral.
16 OPA0APORTCON-
FLICT
1 if any of the APORTs being requested by the OPA0 are also being requested by another peripheral.
15:6 Reserved
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Reset Access Description
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0 R OPA1 Output Valid Status
0 R OPA0 Output Valid Status
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0 R OPA1 Warm Status
0 R OPA0 Warm Status
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0 R OPA1 Enabled Status
0 R OPA0 Enabled Status
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0 R OPA1 Bus Conflict Output
0 R OPA0 Bus Conflict Output
To ensure compatibility with future devices, always write bits to 0. More information in
tions
Bit Position
Reference Manual
VDAC - Digital to Analog Converter
1.2 Conven-
1.2 Conven-
1.2 Conven-
1.2 Conven-
1.2 Conven-
Rev. 1.1 | 767