Silicon Laboratories EFR32xG14 Wireless Gecko Reference Manual page 483

17.3.1.3 Addresses
2
I C supports both 7-bit and 10-bit addresses. When using 7-bit addresses, the first byte transmitted after the START-condition contains
the address of the slave that the master wants to contact. In the 7-bit address space, several addresses are reserved. These addresses
are summarized in Table 17.1 I2C Reserved I
broadcast a message to all slaves on the I
2
I C Address
0000-000
0000-000
0000-001
0000-010
0000-011
0000-1XX
1111-1XX
1111-0XX
17.3.1.4 10-bit Addressing
To address a slave using a 10-bit address, two bytes are required to specify the address instead of one. The seven first bits of the first
byte must then be 1111 0XX, where XX are the two most significant bits of the 10-bit address. As with 7-bit addresses, the eighth bit of
the first byte determines whether the master wishes to read from or write to the slave. The second byte contains the eight least signifi-
cant bits of the slave address.
When a slave receives a 10-bit address, it must acknowledge both the address bytes if they match the address of the slave.
When performing a master transmitter operation, the master transmits the two address bytes and then the remaining data, as shown in
Figure 17.9 I2C Master Transmitter/Slave Receiver with 10-bit Address on page
S ADDR (1st 7 bits)
When performing a master receiver operation however, the master first transmits the two address bytes in a master transmitter opera-
tion, then sends a repeated START followed by the first address byte and then receives data from the addressed slave. The slave ad-
dressed by the 10-bit address in the first two address bytes must remember that it was addressed, and respond with data if the address
transmitted after the repeated start matches its own address. An example of this (with one byte transmitted) is shown in
17.10 I2C Master Receiver/Slave Transmitter with 10-bit Address on page
S ADDR (1st 7 bits)
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C Addresses on page
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C-bus.
Table 17.1. I2C Reserved I
R/W
0
1
X
X
X
X
X
X
W A
Figure 17.9. I2C Master Transmitter/Slave Receiver with 10-bit Address
W A Addr (2nd byte)
Figure 17.10. I2C Master Receiver/Slave Transmitter with 10-bit Address
483, and include a General Call address which can be used to
2
C Addresses
483.
Addr (2nd byte) A
483.
A Sr ADDR (1st 7 bits)
Reference Manual
I2C - Inter-Integrated Circuit Interface
Description
General Call address
START byte
Reserved for the C-Bus format
Reserved for a different bus format
Reserved for future purposes
Reserved for future purposes
Reserved for future purposes
10 Bit slave addressing mode
DATA A P
R A DATA
Figure
N P
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