Pcntn_Topb - Top Value Buffer Register (Async Reg); Pcntn_If - Interrupt Flag Register - Silicon Laboratories EFR32xG14 Wireless Gecko Reference Manual

16.5.6 PCNTn_TOPB - Top Value Buffer Register (Async Reg)

For more information about asynchronous registers see
Offset
0x014
Reset
Access
Name
Bit Name
31:16 Reserved
15:0 TOPB
Loaded automatically to TOP when written.

16.5.7 PCNTn_IF - Interrupt Flag Register

Offset
0x018
Reset
Access
Name
Bit Name
31:6 Reserved
5 OQSTERR
Set in the Oversampling Quadrature Mode when incorrect state transition occurs
4 TCC
Set upon triggered compare match
3 AUXOF
Set when an Auxiliary CNT overflow occurs
2 DIRCNG
Set when the count direction changes. Set in EXTCLKQUAD mode only.
1 OF
Set when a CNT overflow occurs
0 UF
Set when a CNT underflow occurs
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4.3 Access to Low Energy Peripherals (Asynchronous
Reset Access Description
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0x00FF RW Counter Top Buffer
Reset Access Description
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0 R Oversampling Quadrature State Error Interrupt
0 R Triggered Compare Interrupt Read Flag
0 R Auxiliary Overflow Interrupt Read Flag
0 R Direction Change Detect Interrupt Flag
0 R Overflow Interrupt Read Flag
0 R Underflow Interrupt Read Flag
Bit Position
Bit Position
Reference Manual
PCNT - Pulse Counter
Registers).
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