Cmu_Lfbpresc0 - Low Frequency B Prescaler Register 0 (Async Reg) - Silicon Laboratories EFR32xG14 Wireless Gecko Reference Manual

Bit Name
14
15

11.5.38 CMU_LFBPRESC0 - Low Frequency B Prescaler Register 0 (Async Reg)

Offset
0x128
Reset
Access
Name
Bit Name
31:6 Reserved
5:4 LEUART0
Configure Low Energy UART 0 prescaler
Value
0
1
2
3
3:0 SYSTICK
Configure prescaler
Value
0
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Reset Access Description
DIV16384 LFACLK
DIV32768 LFACLK
Reset Access Description
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0x0 RW Low Energy UART 0 Prescaler
Mode Description
DIV1 LFBCLK
DIV2 LFBCLK
DIV4 LFBCLK
DIV8 LFBCLK
0x0 Prescaler
Mode Description
DIV1 LFBCLK
= LFACLK/16384
LETIMER0
= LFACLK/32768
LETIMER0
Bit Position
= LFBCLK
LEUART0
= LFBCLK/2
LEUART0
= LFBCLK/4
LEUART0
= LFBCLK/8
LEUART0
= LFBCLK
SYSTICK
Reference Manual
CMU - Clock Management Unit
1.2 Conven-
Rev. 1.1 | 352