I2Cn_State - State Register - Silicon Laboratories EFR32xG14 Wireless Gecko Reference Manual

17.5.3 I2Cn_STATE - State Register

Offset
0x008
Reset
Access
Name
Bit Name
31:8 Reserved
7:5 STATE
The state of any current transmission. Cleared if the I
Value
0
1
2
3
4
5
6
4 BUSHOLD
Set if the bus is currently being held by this I
3 NACKED
Set if a NACK was received and STATE is ADDRACK or DATAACK.
2 TRANSMITTER
Set when operating as a master transmitter or a slave transmitter. When cleared, the system may be operating as a master
receiver, a slave receiver or the current mode is not known.
1 MASTER
Set when operating as an I
0 BUSY
Set when the bus is busy. Whether the I
the MCU comes out of reset, the state of the bus is not known, and thus BUSY is set. Use the ABORT command or a bus
idle timeout to force the I
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Reset Access Description
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0x0 R Transmission State
Mode Description
IDLE No transmission is being performed.
WAIT Waiting for idle. Will send a start condition as soon as the bus is idle.
START Start transmitted or received
ADDR Address transmitted or received
ADDRACK Address ack/nack transmitted or received
DATA Data transmitted or received
DATAACK Data ack/nack transmitted or received
0 R Bus Held
2
C module.
0 R Nack Received
0 R Transmitter
0 R Master
2
C master. When cleared, the system may be operating as an I
1 R Bus Busy
2
C module is in control of the bus or not has no effect on the value of this bit. When
2
C module out of the BUSY state.
Bit Position
2
C module is idle.
Reference Manual
I2C - Inter-Integrated Circuit Interface
1.2 Conven-
2
C slave.
Rev. 1.1 | 508