Block Diagram - Silicon Laboratories EFR32xG14 Wireless Gecko Reference Manual

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8.2 Block Diagram

An overview of the LDMA and the modules it interacts with is shown in
Peripheral
Peripheral
Peripheral
Peripheral
The Linked DMA Controller consists of three main parts
• A DMA core that executes transfers and communicates status to the core
• A channel select block that routes peripheral DMA requests and acknowledge signals to the DMA
• A set of internal channel configuration registers for tracking the progress of each DMA channel
The DMA has access to all system memory through the AHB bus and the AHB->APB bridge. It can load channel descriptors from mem-
ory with no CPU intervention.
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Cortex
Interrupts
LDMA Core
Error
Channel
done
ACK/
Channel
REQ
select
LDMA
Figure 8.1. LDMA Block Diagram
Figure 8.1 LDMA Block Diagram on page
AHB
Channel 0
Channel 1
Channel N
Reference Manual
LDMA - Linked DMA Controller
155.
RAM
Descriptor A
Descriptor B
Descriptor C
Rev. 1.1 | 155

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