Lesense_Routepen - I/O Routing Register (Async Reg) - Silicon Laboratories EFR32xG14 Wireless Gecko Reference Manual

28.5.24 LESENSE_ROUTEPEN - I/O Routing Register (Async Reg)

For more information about asynchronous registers see
Offset
0x064
Reset
Access
Name
Bit Name
31:24 Reserved
23 ALTEX7PEN
Set this bit to enable LESENSE ALTEX7 pin
22 ALTEX6PEN
Set this bit to enable LESENSE ALTEX6 pin
21 ALTEX5PEN
Set this bit to enable LESENSE ALTEX5 pin
20 ALTEX4PEN
Set this bit to enable LESENSE ALTEX4 pin
19 ALTEX3PEN
Set this bit to enable LESENSE ALTEX3 pin
18 ALTEX2PEN
Set this bit to enable LESENSE ALTEX2 pin
17 ALTEX1PEN
Set this bit to enable LESENSE ALTEX1 pin
16 ALTEX0PEN
Set this bit to enable LESENSE ALTEX0 pin
15 CH15PEN
Set this bit to enable LESENSE CH15 pin
14 CH14PEN
Set this bit to enable LESENSE CH14 pin
13 CH13PEN
Set this bit to enable LESENSE CH13 pin
12 CH12PEN
Set this bit to enable LESENSE CH12 pin
11 CH11PEN
Set this bit to enable LESENSE CH11 pin
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4.3 Access to Low Energy Peripherals (Asynchronous
Reset Access Description
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0 RW ALTEX7 Pin Enable
0 RW ALTEX6 Pin Enable
0 RW ALTEX5 Pin Enable
0 RW ALTEX4 Pin Enable
0 RW ALTEX3 Pin Enable
0 RW ALTEX2 Pin Enable
0 RW ALTEX1 Pin Enable
0 RW ALTEX0 Pin Enable
0 RW CH15 Pin Enable
0 RW CH14 Pin Enable
0 RW CH13 Pin Enable
0 RW CH12 Pin Enable
0 RW CH11 Pin Enable
LESENSE - Low Energy Sensor Interface
Bit Position
Reference Manual
Registers).
1.2 Conven-
Rev. 1.1 | 988