Silicon Laboratories EFR32xG14 Wireless Gecko Manuals

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Silicon Laboratories EFR32xG14 Wireless Gecko Reference Manual (1140 pages)

Brand: Silicon Laboratories | Category: Computer Hardware | Size: 8 MB

Table of Contents
2
1 About this Document

26
- Introduction
  26
- Conventions
  26
- Related Documentation
  27
2 System Overview

28
- Introduction
  28
- Block Diagrams
  29
- MCU Features Overview
  30
- Oscillators and Clocks
  32
- RF Frequency Synthesizer
  32
- Modulation Modes
  32
- Transmit Mode
  33
- Receive Mode
  33
- Data Buffering
  33
- Unbuffered Data Transfer
  33
- Frame Format Support
  33
- Hardware CRC Support
  34
- Convolutional Encoding / Decoding
  34
- Binary Block Encoding / Decoding
  34
- Data Encryption and Authentication
  35
- Timers
  36
- RF Test Modes
  36
3 System Processor

37
- Introduction
  37
- Features
  38
- Functional Description
  38
  - Interrupt Operation
    39
  - Interrupt Request Lines (IRQ)
    40
4 Memory and Bus System

41
5 Radio Transceiver

114
- Introduction
  115
6 DBG - Debug Interface

116
- Introduction
  116
- Features
  116
- Functional Description
  116
  - Debug Pins
    117
  - Debug and EM2 Deep Sleep/Em3 Stop
    117
  - Authentication Access Point
    117
  - Debug Lock
    118
  - AAP Lock
    118
  - Debugger Reads of Actionable Registers
    119
  - Debug Recovery
    119
- Register Map
  119
- Register Description
  120
  - AAP_CMD - Command Register
    120
  - AAP_CMDKEY - Command Key Register
    120
  - AAP_STATUS - Status Register
    121
  - AAP_CTRL - Control Register
    121
  - AAP_CRCCMD - CRC Command Register
    122
  - AAP_CRCSTATUS - CRC Status Register
    122
  - AAP_CRCADDR - CRC Address Register
    123
  - AAP_CRCRESULT - CRC Result Register
    123
  - AAP_IDR - AAP Identification Register
    124
7 MSC - Memory System Controller

125
- Introduction
  125
- Features
  126
- Functional Description
  127
  - User Data (UD)
    127
  - Lock Bits (LB)
    128
  - Device Information (DI) Page
    128
  - Bootloader
    129
  - Device Revision
    129
  - Post-Reset Behavior
    129
  - Flash Startup
    130
  - Wait-States
    130
  - Suppressed Conditional Branch Target Prefetch (SCBTP)
    131
  - Cortex-M4 If-Then Block Folding
    131
  - Instruction Cache
    132
  - Low Voltage Flash Read
    133
  - Erase and Write Operations
    133
- Register Map
  134
- Register Description
  135
8 LDMA - Linked DMA Controller

153
- Introduction
  153
  - Features
    154
- Block Diagram
  155
- Functional Description
  156
  - Channel Descriptor
    156
  - Channel Configuration
    161
  - Channel Select Configuration
    161
  - Starting a Transfer
    161
  - Managing Transfer Errors
    162
  - Arbitration
    162
  - Channel Descriptor Data Structure
    165
  - Interaction with the EMU
    167
  - Interrupts
    168
  - Debugging
    168
- Examples
  168
  - Single Direct Register DMA Transfer
    168
  - Descriptor Linked List
    169
  - Single Descriptor Looped Transfer
    171
  - Descriptor List with Looping
    172
  - Simple Inter-Channel Synchronization
    173
  - Copy
    175
  - Ping-Pong
    177
  - Scatter-Gather
    178
- Register Map
  179
- Register Description
  180
9 RMU - Reset Management Unit

199
- Introduction
  199
- Features
  199
- Functional Description
  200
  - Reset Levels
    201
  - RMU_RSTCAUSE Register
    202
  - Power-On Reset (POR)
    203
  - Brown-Out Detector (BOD)
    203
  - Resetn Pin Reset
    204
  - Watchdog Reset
    204
  - Lockup Reset
    204
  - System Reset Request
    204
  - Reset State
    204
  - Register Reset Signals
    204
- Register Map
  206
- Register Description
  207
  - RMU_CTRL - Control Register
    207
  - RMU_RSTCAUSE - Reset Cause Register
    209
  - RMU_CMD - Command Register
    210
  - RMU_RST - Reset Control Register
    210
  - RMU_LOCK - Configuration Lock Register
    211
10 EMU - Energy Management Unit

212
11 CMU - Clock Management Unit

279
12 SMU - Security Management Unit

364
- Introduction
  364
- Features
  364
- Functional Description
  365
  - PPU - Peripheral Protection Unit
    365
  - Programming Model
    366
- Register Map
  367
- Register Description
  368
13 RTCC - Real Time Counter and Calendar

376
14 WDOG - Watchdog Timer

405
- Introduction
  405
- Features
  405
- Functional Description
  405
  - Clock Source
    406
  - Debug Functionality
    406
  - Energy Mode Handling
    406
  - Register Access
    406
  - Warning Interrupt
    406
  - Window Interrupt
    407
  - PRS as Watchdog Clear
    408
  - PRS Rising Edge Monitoring
    408
- Register Map
  409
- Register Description
  410
15 PRS - Peripheral Reflex System

420
- Introduction
  420
- Features
  420
- Functional Description
  421
  - Channel Functions
    421
  - Producers
    422
  - Consumers
    423
  - Event on PRS
    424
  - DMA Request on PRS
    424
  - Example
    425
- Register Map
  425
- Register Description
  426
16 PCNT - Pulse Counter

446
- Introduction
  446
- Features
  446
- Functional Description
  447
  - Pulse Counter Modes
    447
  - Hysteresis
    454
  - Auxiliary Counter
    455
  - Triggered Compare and Clear
    456
  - Register Access
    457
  - Clock Sources
    457
  - Input Filter
    457
  - Edge Polarity
    458
  - PRS and Pcntn_S0In,Pcntn_S1In Inputs
    458
  - Interrupts
    458
  - Cascading Pulse Counters
    460
- Register Map
  461
- Register Description
  462
17 I2C - Inter-Integrated Circuit Interface

478
- Introduction
  478
- Features
  478
- Functional Description
  479
  - I2C-Bus Overview
    480
  - Enable and Reset
    484
  - Safely Disabling and Changing Slave Configuration
    484
  - Clock Generation
    484
  - Arbitration
    485
  - Buffers
    485
  - Master Operation
    487
  - Bus States
    495
  - Slave Operation
    495
  - Transfer Automation
    499
  - Using 10-Bit Addresses
    500
  - Error Handling
    500
  - DMA Support
    502
  - Interrupts
    502
  - Wake-Up
    502
- Register Map
  503
- Register Description
  504
18 USART - Universal Synchronous Asynchronous Receiver/Transmitter

526
19 LEUART - Low Energy Universal Asynchronous Receiver/Transmitter

615
20 TIMER/WTIMER - Timer/Counter

651
21 LETIMER - Low Energy Timer

714
- Introduction
  714
- Features
  714
- Functional Description
  715
  - Timer
    715
  - Compare Registers
    715
  - Top Value
    716
  - Underflow Output Action
    722
  - PRS Output
    724
  - Examples
    724
  - Register Access
    727
- Register Map
  728
- Register Description
  729
22 CRYOTIMER - Ultra Low Energy Timer/Counter

745
- Introduction
  745
- Features
  745
- Functional Description
  745
  - Block Diagram
    746
  - Operation
    747
  - Debug Mode
    747
  - Energy Mode Availability
    747
- Register Map
  748
- Register Description
  749
23 VDAC - Digital to Analog Converter

754
- Introduction
  754
- Features
  755
- Functional Description
  755
  - Power Supply
    756
  - I/O Pin Considerations
    756
  - Enabling and Disabling a Channel
    756
  - Conversions
    757
  - Reference Selection
    757
  - Warmup Time and Initial Conversion
    758
  - Analog Output
    758
  - Output Mode
    758
  - Async Mode
    759
  - Refresh Timer
    759
  - Clock Prescaling
    759
  - High Speed
    759
  - Sine Generation Mode
    760
  - PRS Outputs
    761
  - Warmup Mode
    762
    
    Register Map
    763
    
    Register Description
    764
  - Vdacn_Status - Status Register
    767
  - Vdacn_Ch0Ctrl - Channel 0 Control Register
    769
  - Vdacn_Ch1Ctrl - Channel 1 Control Register
    771
  - Vdacn_Cmd - Command Register
    773
  - Vdacn_If - Interrupt Flag Register
    774
  - Vdacn_Ifs - Interrupt Flag Set Register
    776
  - Vdacn_Ifc - Interrupt Flag Clear Register
    778
  - Vdacn_Ien - Interrupt Enable Register
    780
  - Vdacn_Ch0Data - Channel 0 Data Register
    781
  - Vdacn_Ch1Data - Channel 1 Data Register
    782
  - Vdacn_Cal - Calibration Register
    783
  - Vdacn_Opax_Aportreq - Operational Amplifier APORT Request Status Register
    784
  - 23.5.15 Vdacn_Opax_Aportconflict - Operational Amplifier APORT Conflict Status Register
    785
  - Vdacn_Opax_Ctrl - Operational Amplifier Control Register
    786
  - Vdacn_Opax_Timer - Operational Amplifier Timer Control Register
    789
  - Vdacn_Opax_Mux - Operational Amplifier Mux Configuration Register
    790
  - Vdacn_Opax_Out - Operational Amplifier Output Configuration Register
    793
  - Vdacn_Opax_Cal - Operational Amplifier Calibration Register
    795
24 OPAMP - Operational Amplifier

797
- Functional Description
  798
- Opamp Configuration
  799
- Interrupts and PRS Output
  803
- Opamp VDAC Combination
  810
- Register Map
  811
25 ACMP - Analog Comparator

812
- Features
  813
26 ADC - Analog to Digital Converter

844
27 IDAC - Current Digital to Analog Converter

920
28 LESENSE - Low Energy Sensor Interface

931
29 GPCRC - General Purpose Cyclic Redundancy Check

999
- Functional Description
  1000
- Polynomial Specification
  1001
- Byte-Level Bit Reversal and Byte Reordering
  1002
  - Register Map
    1004
  - Register Description
    1005
- GPCRC_CMD - Command Register
  1006
- GPCRC_POLY - CRC Polynomial Value
  1007
- GPCRC_INPUTDATAHWORD - Input 16-Bit Data Register
  1008
- GPCRC_DATA - CRC Data Register
  1009
- GPCRC_DATABYTEREV - CRC Data Byte Reverse Register
  1010
30 TRNG - True Random Number Generator

1011
- Functional Description
  1012
- Data Format - Byte Ordering
  1013
  - Register Map
    1015
  - Register Description
    1016
- Trngn_Fifolevel - FIFO Level Register (Actionable Reads)
  1018
- Trngn_Key0 - Key Register 0
  1019
- Trngn_Key2 - Key Register 2
  1020
- Trngn_Testdata - Test Data Register
  1021
- Trngn_Status - Status Register
  1022
- Trngn_Initwaitval - Initial Wait Counter
  1023
31 CRYPTO - Crypto Accelerator

1024
32 GPIO - General Purpose Input/Output

1082
- Features
  1083
- Functional Description
  1084
- Pin Configuration
  1085
- EM4 Wake-Up
  1088
- Alternate Functions
  1089
- Output to PRS
  1091
  - Register Map
    1092
  - Register Description
    1094
- Gpio_Px_Model - Port Pin Mode Low Register
  1096
- Gpio_Px_Modeh - Port Pin Mode High Register
  1101
- Gpio_Px_Dout - Port Data out Register
  1106
- Gpio_Px_Din - Port Data in Register
  1107
- Gpio_Px_Ovtdis - over Voltage Disable for All Modes
  1108
- GPIO_EXTIPSELL - External Interrupt Port Select Low Register
  1109
- GPIO_EXTIPSELH - External Interrupt Port Select High Register
  1112
- GPIO_EXTIPINSELL - External Interrupt Pin Select Low Register
  1115
- GPIO_EXTIPINSELH - External Interrupt Pin Select High Register
  1118
- GPIO_EXTIRISE - External Interrupt Rising Edge Trigger Register
  1120
- GPIO_EXTIFALL - External Interrupt Falling Edge Trigger Register
  1121
- GPIO_EXTILEVEL - External Interrupt Level Register
  1122
- GPIO_IF - Interrupt Flag Register
  1123
- GPIO_IFC - Interrupt Flag Clear Register
  1124
- GPIO_EM4WUEN - EM4 Wake up Enable Register
  1125
- GPIO_ROUTEPEN - I/O Routing Pin Enable Register
  1126
- GPIO_ROUTELOC0 - I/O Routing Location Register
  1127
- GPIO_LOCK - Configuration Lock Register
  1128
33 APORT - Analog Port

1129
- Functional Description
  1130
- APORT ABUS Naming
  1131
- Managing Abuses
  1134
34 Revision History

1136
Appendix 1. Abbreviations

1137

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Motherboard Microcontrollers Computer Hardware Control Unit Adapter

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Silicon Laboratories EFR32xG14 Wireless Gecko Manuals

Silicon Laboratories EFR32xG14 Wireless Gecko Reference Manual (1140 pages)

Table of Contents

1 About this Document

2 System Overview

3 System Processor

4 Memory and Bus System

5 Radio Transceiver

6 DBG - Debug Interface

7 MSC - Memory System Controller

8 LDMA - Linked DMA Controller

9 RMU - Reset Management Unit

10 EMU - Energy Management Unit

11 CMU - Clock Management Unit

12 SMU - Security Management Unit

13 RTCC - Real Time Counter and Calendar

14 WDOG - Watchdog Timer

15 PRS - Peripheral Reflex System

16 PCNT - Pulse Counter

17 I2C - Inter-Integrated Circuit Interface

18 USART - Universal Synchronous Asynchronous Receiver/Transmitter

19 LEUART - Low Energy Universal Asynchronous Receiver/Transmitter

20 TIMER/WTIMER - Timer/Counter

21 LETIMER - Low Energy Timer

22 CRYOTIMER - Ultra Low Energy Timer/Counter

23 VDAC - Digital to Analog Converter

24 OPAMP - Operational Amplifier

25 ACMP - Analog Comparator

26 ADC - Analog to Digital Converter

27 IDAC - Current Digital to Analog Converter

28 LESENSE - Low Energy Sensor Interface

29 GPCRC - General Purpose Cyclic Redundancy Check

30 TRNG - True Random Number Generator

31 CRYPTO - Crypto Accelerator

32 GPIO - General Purpose Input/Output

33 APORT - Analog Port

34 Revision History

Appendix 1. Abbreviations

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