Leuartn_Syncbusy - Synchronization Busy Register - Silicon Laboratories EFR32xG14 Wireless Gecko Reference Manual

19.5.18 LEUARTn_SYNCBUSY - Synchronization Busy Register

Offset
0x044
Reset
Access
Name
Bit Name
31:8 Reserved
7 PULSECTRL
Set when the value written to PULSECTRL is being synchronized.
6 TXDATA
Set when the value written to TXDATA is being synchronized.
5 TXDATAX
Set when the value written to TXDATAX is being synchronized.
4 SIGFRAME
Set when the value written to SIGFRAME is being synchronized.
3 STARTFRAME
Set when the value written to STARTFRAME is being synchronized.
2 CLKDIV
Set when the value written to CLKDIV is being synchronized.
1 CMD
Set when the value written to CMD is being synchronized.
0 CTRL
Set when the value written to CTRL is being synchronized.
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LEUART - Low Energy Universal Asynchronous Receiver/Transmitter
Reset Access Description
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0 R PULSECTRL Register Busy
0 R TXDATA Register Busy
0 R TXDATAX Register Busy
0 R SIGFRAME Register Busy
0 R STARTFRAME Register Busy
0 R CLKDIV Register Busy
0 R CMD Register Busy
0 R CTRL Register Busy
Bit Position
Reference Manual
1.2 Conven-
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