Wdog_Ifc - Interrupt Flag Clear Register - Silicon Laboratories EFR32xG14 Wireless Gecko Reference Manual

14.5.7 WDOG_IFC - Interrupt Flag Clear Register

Offset
0x024
Reset
Access
Name
Bit Name
31:5 Reserved
4 PEM1
Write 1 to clear the PEM1 interrupt flag. Reading returns the value of the IF and clears the corresponding interrupt flags
(This feature must be enabled globally in MSC.).
3 PEM0
Write 1 to clear the PEM0 interrupt flag. Reading returns the value of the IF and clears the corresponding interrupt flags
(This feature must be enabled globally in MSC.).
2 WIN
Write 1 to clear the WIN interrupt flag. Reading returns the value of the IF and clears the corresponding interrupt flags (This
feature must be enabled globally in MSC.).
1 WARN
Write 1 to clear the WARN interrupt flag. Reading returns the value of the IF and clears the corresponding interrupt flags
(This feature must be enabled globally in MSC.).
0 TOUT
Write 1 to clear the TOUT interrupt flag. Reading returns the value of the IF and clears the corresponding interrupt flags
(This feature must be enabled globally in MSC.).
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Reset Access Description
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0 (R)W1 Clear PEM1 Interrupt Flag
0 (R)W1 Clear PEM0 Interrupt Flag
0 (R)W1 Clear WIN Interrupt Flag
0 (R)W1 Clear WARN Interrupt Flag
0 (R)W1 Clear TOUT Interrupt Flag
Bit Position
Reference Manual
WDOG - Watchdog Timer
1.2 Conven-
Rev. 1.1 | 418