Cmu_Hfperclken0 - High Frequency Peripheral Clock Enable Register 0 - Silicon Laboratories EFR32xG14 Wireless Gecko Reference Manual

11.5.27 CMU_HFPERCLKEN0 - High Frequency Peripheral Clock Enable Register 0

Offset
0x0C0
Reset
Access
Name
Bit Name
31:13 Reserved
12 TRNG0
Set to enable the clock for TRNG0.
11 IDAC0
Set to enable the clock for IDAC0.
10 VDAC0
Set to enable the clock for VDAC0.
9 ADC0
Set to enable the clock for ADC0.
8 I2C0
Set to enable the clock for I2C0.
7 CRYOTIMER
Set to enable the clock for CRYOTIMER.
6 ACMP1
Set to enable the clock for ACMP1.
5 ACMP0
Set to enable the clock for ACMP0.
4 USART1
Set to enable the clock for USART1.
3 USART0
Set to enable the clock for USART0.
2 WTIMER0
Set to enable the clock for WTIMER0.
1 TIMER1
Set to enable the clock for TIMER1.
silabs.com | Building a more connected world.
Reset Access Description
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0 RW True Random Number Generator 0 Clock Enable
0 RW Current Digital to Analog Converter 0 Clock Enable
0 RW Digital to Analog Converter 0 Clock Enable
0 RW Analog to Digital Converter 0 Clock Enable
0 RW I2C 0 Clock Enable
0 RW CryoTimer Clock Enable
0 RW Analog Comparator 1 Clock Enable
0 RW Analog Comparator 0 Clock Enable
0 RW Universal Synchronous/Asynchronous Receiver/Transmitter 1
Clock Enable
0 RW Universal Synchronous/Asynchronous Receiver/Transmitter 0
Clock Enable
0 RW Wide Timer 0 Clock Enable
0 RW Timer 1 Clock Enable
Bit Position
Reference Manual
CMU - Clock Management Unit
1.2 Conven-
Rev. 1.1 | 345