Silicon Laboratories EFR32xG14 Wireless Gecko Reference Manual page 671

DTAR DTFATS
0 0
0 1
1 0
1 1
20.3.3.1 Output Polarity
The value of the primary and complementary outputs in a pair will never be set active at the same time by the DTI unit. The polarity of
the outputs can be changed if this is required by the application. The active values of the primary and complementary outputs are set by
the DTIPOL and DTCINV bits in the TIMER0_DTCTRL register. The DTIPOL bit of this register specifies the base polarity. If DTIPOL
=0, then the outputs are active-high, and if DTIPOL = 1 they are active-low. The relative phase of the primary and complementary out-
puts is not changed by DTIPOL, as the polarity of both outputs is changed, see
page 671.
In some applications, it may be required that the primary outputs are active-high, while the complementary outputs are active-low. This
can be accomplished by manipulating the DTCINV bit of the TIMER0_DTCTRL register, which inverts the polarity of the complementary
outputs relative to the primary outputs. As an example, DTIPOL = 0 and DTCINV = 0 results in outputs with opposite phase and active-
high states. Similarly, DTIPOL = 1 and DTCINV = 1 results in outputs with equal phase and the primary output will be active-high while
the complementary will be active-low.
Original PWM
DTIPOL = 0
DTCINV = 0
DTIPOL = 1
DTCINV = 0
DTIPOL = 0
DTCINV = 1
DTIPOL = 1
DTCINV = 1
Output generation on the individual DTI outputs can be disabled by configuring TIMER0_DTOGEN. When output generation on an out-
put is disabled that output will go to and stay in its inactive state.
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Table 20.3. DTI Output When Timer Halted
State
frozen
safe
running
running
TIM0_CC0
TIM0_CDTI0
TIM0_CC0
TIM0_CDTI0
TIM0_CC0
TIM0_CDTI0
TIM0_CC0
TIM0_CDTI0
Figure 20.43. TIMER/WTIMER Output Polarities
TIMER/WTIMER - Timer/Counter
Figure 20.43 TIMER/WTIMER Output Polarities on
Reference Manual
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