15.5.3 PRS_ROUTEPEN - I/O Routing Pin Enable Register
Offset
0x008
Reset
Access
Name
Bit
Name
31:12
Reserved
11
CH11PEN
When set, GPIO output from PRS channel 11 is enabled
10
CH10PEN
When set, GPIO output from PRS channel 10 is enabled
9
CH9PEN
When set, GPIO output from PRS channel 9 is enabled
8
CH8PEN
When set, GPIO output from PRS channel 8 is enabled
7
CH7PEN
When set, GPIO output from PRS channel 7 is enabled
6
CH6PEN
When set, GPIO output from PRS channel 6 is enabled
5
CH5PEN
When set, GPIO output from PRS channel 5 is enabled
4
CH4PEN
When set, GPIO output from PRS channel 4 is enabled
3
CH3PEN
When set, GPIO output from PRS channel 3 is enabled
2
CH2PEN
When set, GPIO output from PRS channel 2 is enabled
1
CH1PEN
When set, GPIO output from PRS channel 1 is enabled
0
CH0PEN
When set, GPIO output from PRS channel 0 is enabled
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Reset
Access
Description
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0
RW
CH11 Pin Enable
0
RW
CH10 Pin Enable
0
RW
CH9 Pin Enable
0
RW
CH8 Pin Enable
0
RW
CH7 Pin Enable
0
RW
CH6 Pin Enable
0
RW
CH5 Pin Enable
0
RW
CH4 Pin Enable
0
RW
CH3 Pin Enable
0
RW
CH2 Pin Enable
0
RW
CH1 Pin Enable
0
RW
CH0 Pin Enable
Bit Position
Reference Manual
PRS - Peripheral Reflex System
1.2 Conven-
Rev. 1.1 | 428
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