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26.3.10.6 Oversampling
To achieve higher accuracy, hardware oversampling can be enabled individually for each mode (Set RES in ADCn_SINGLECTRL/
ADCn_SCANCTRL to 0x3). The oversampling rate (OVSRSEL in ADCn_CTRL) can be set to any integer power of 2 from 2 to 4096
and the configuration is shared between the scan and single channel mode (OVSRSEL field in ADCn_CTRL).
With oversampling, each input is sampled at 12-bits of resolution a number of times (given by OVSRSEL), and the results are filtered by
a first order accumulate and dump filter to form the end result. The data presented in the ADCn_SINGLEDATA and ADCn_SCANDATA
registers are the direct contents of the accumulation register (sum of samples). However, if the oversampling ratio is set higher than
16x, the accumulated results are shifted to fit the MSB in bit 15 as shown in
page
865.
Oversampling setting
2x
4x
8x
16x
32x
64x
128x
256x
512x
1024x
2048x
4096x
26.3.10.7 Adjustment
By default, all results are right adjusted, with the LSB of the result in bit position 0 (zero). In differential mode the signed bit is extended
up to bit 31, but in single ended mode the bits above the result are read as 0. By setting ADJ in ADCn_SINGLECTRL/
ADCn_SCANCTRL, the results are left adjusted as shown in
ted, the MSB is always placed on bit 15 and sign extended to bit 31. All bits below the conversion result are read as 0 (zero).
Adjustment
Resolution
12
8
Right
6
OVS
12
8
Left
6
OVS
silabs.com | Building a more connected world.
Table 26.4. Oversampling Result Shifting and Resolution
# right shifts
0
0
0
0
1
2
3
4
5
6
7
8
Table 26.5 ADC Results Representation on page
Table 26.5. ADC Results Representation
31 ... 16
15
14
13
11 ... 11
11
11
11
7 ... 7
7
7
7
5 ... 5
5
5
5
15 ... 15
15
14
13
11 ... 11
11
10
9
7 ... 7
7
6
5
5 ... 5
5
4
3
15 ... 15
15
14
13
Table 26.4 Oversampling Result Shifting and Resolution on
Result Resolution # bits
13
14
15
16
16
16
16
16
16
16
16
16
Bits
12
11
10
9
8
7
11
11
10
9
8
7
7
7
7
7
7
7
5
5
5
5
5
5
12
11
10
9
8
7
8
7
6
5
4
3
4
3
2
1
0
-
2
1
0
-
-
-
12
11
10
9
8
7
Reference Manual
ADC - Analog to Digital Converter
865. When left adjus-
6
5
4
3
2
1
6
5
4
3
2
1
6
5
4
3
2
1
5
5
4
3
2
1
6
5
4
3
2
1
2
1
0
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
6
5
4
3
2
1
Rev. 1.1 | 865
0
0
0
0
0
-
-
-
0
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