Dbg - Debug Interface; Introduction; Features; Functional Description - Silicon Laboratories EFR32xG14 Wireless Gecko Reference Manual

6. DBG - Debug Interface

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ARM Cortex-M
DBG

6.1 Introduction

The EFR32 devices include hardware debug support through a 2-pin serial-wire debug (SWD) interface or a 4-pin Joint Test Action
Group (JTAG) interface.
For more technical information about the debug interface the reader is referred to:
• ARM Cortex-M4 Technical Reference Manual
• ARM CoreSight Components Technical Reference Manual
• ARM Debug Interface v5 Architecture Specification
• IEEE Standard for Test Access Port and Boundary-Scan Architecture, IEEE 1149.1-2013

6.2 Features

• Debug Access Port Serial Wire JTAG (DAPSWJ)
• Implements the ADIv5 debug interface
• Authentication Access Point (AAP)
• Implements various user commands
• Flash Patch and Breakpoint (FPB) unit
• Implement breakpoints and code patches
• Data Watch point and Trace (DWT) unit
• Implement watch points, trigger resources and system profiling
• Instrumentation Trace Macrocell (ITM)
• Application-driven trace source that supports printf style debugging

6.3 Functional Description

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What?
The Debug Interface is used to program and debug
EFR32 devices.
Why?
The Debug Interface makes it easy to re-program
and update the system in the field, and allows de-
bugging with minimal I/O pin usage.
How?
The Cortex-M4 supports advanced debugging fea-
tures. EFR32 devices can use a minimum of two
port pins for debugging or programming. The inter-
nal and external state of the system can be exam-
ined with debug extensions supporting instruction or
data access break and watch points.
Debug Data
Reference Manual
DBG - Debug Interface
Quick Facts
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