Functional Description; Counter Modes - Silicon Laboratories EFR32xG14 Wireless Gecko Reference Manual

• Configurable action on fault
• Set outputs inactive
• Clear output
• Tristate output
• Individual fault sources
• One or two PRS signals
• Debugger
• Support for automatic restart
• Core lockup
• Configuration lock

20.3 Functional Description

An overview of the TIMER/WTIMER module is shown in
a 16/32 bit up/down counter with 3 Compare/Capture channels connected to pins TIMn_CC0, TIMn_CC1, and TIMn_CC2.
HFPERCLK
TIMERn
TIMn_CC0
Input logic
PRS inputs
TIMn_CC1
Input logic
PRS inputs
TIMn_CC2
Input logic
PRS inputs
WTIMERs (Wide TIMERs) are 32-bit variants of the TIMER/WTIMER module.

20.3.1 Counter Modes

The timer consists of a counter that can be configured to the following modes:
1. Up-count: Counter counts up until it reaches the value in TIMERn_TOP, where it is reset to 0 before counting up again.
2. Down-count: The counter starts at the value in TIMERn_TOP and counts down. When it reaches 0, it is reloaded with the value in
TIMERn_TOP.
3. Up/Down-count: The counter starts at 0 and counts up. When it reaches the value in TIMERn_TOP, it counts down until it reaches
0 and starts counting up again.
4. Quadrature Decoder: Two input channels where one determines the count direction, while the other pin triggers a clock event.
In addition, to the TIMER/WTIMER modes listed above, the TIMER/WTIMER also supports a 2x Count Mode. In this mode the counter
increments/decrements by 2. The 2x Count Mode intended use is to generate 2x PWM frequency when the Compare/Capture channel
is put in PWM mode. The 2x Count Mode can be enabled by setting the X2CNT bitfield in the TIMERn_CTRL register.
The counter value can be read or written by software at any time by accessing the CNT field in TIMERn_CNT.
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Figure 20.1 TIMER/WTIMER Block Overview on page 653
Prescaler CNTCLK
Counter
control
TIMERn_CNT
Quadrature
Decoder
Input Capture
Edge
detect
TnCCR1[15:0
TIMERn_CCx
TnCCR0[15:0
]
Edge
detect
Edge
detect
Figure 20.1. TIMER/WTIMER Block Overview
TIMER/WTIMER - Timer/Counter
Note: For simplicity, all
TIMERn_CCx registers are
Update
grouped together in the figure,
condition
but they all have individual Input
Capture Registers
TIMERn_TOP
=
= 0
Compare and
=
= =
PWM config
]
Compare and
PWM config
Compare and
PWM config
Reference Manual
and it consists of
Overflow
Underflow
Compare Match x
TIMn_CC0
TIMn_CC1
TIMn_CC2
Rev. 1.1 | 653