Msc_If - Interrupt Flag Register - Silicon Laboratories EFR32xG14 Wireless Gecko Reference Manual

7.5.8 MSC_IF - Interrupt Flag Register

Offset
0x030
Reset
Access
Name
Bit Name
31:9 Reserved
8 LVEWRITE
If one, flash controller write command received while in LVE mode
7 Reserved
6 WDATAOV
If one, flash controller write buffer overflow detected
5 ICACHERR
If one, iCache RAM parity Error detected
4 PWRUPF
Set after MSC_CMD.PWRUP received, flash powered up complete and ready for read/write
3 CMOF
Set when MSC_CACHEMISSES overflows
2 CHOF
Set when MSC_CACHEHITS overflows
1 WRITE
Set when a write is done
0 ERASE
Set when erase is done
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Reset Access Description
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0 R Flash LVE Write Error Flag
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0 R Flash Controller Write Buffer Overflow
0 R ICache RAM Parity Error Flag
0 R Flash Power Up Sequence Complete Flag
0 R Cache Misses Overflow Interrupt Flag
0 R Cache Hits Overflow Interrupt Flag
0 R Write Done Interrupt Read Flag
0 R Erase Done Interrupt Read Flag
Bit Position
Reference Manual
MSC - Memory System Controller
1.2 Conven-
1.2 Conven-
Rev. 1.1 | 141