Silicon Laboratories EFR32xG14 Wireless Gecko Reference Manual page 300

11.3.2.8 RC Oscillator Calibration
The CMU has built-in HW support to efficiently calibrate the RC oscillators (LFRCO, HFRCO, AUXHFRCO, etc) at run-time. For a com-
plete list of supported oscillators, refer to DOWNSEL and UPSEL fields in CMU_CALCTRL. See
lator Calibration on page 300
the reference frequency. When the calibration circuit is started, one down-counter running on a selectable clock (DOWNSEL in
CMU_CALCTRL) and one up-counter running on a selectable clock (UPSEL in CMU_CALCTRL) are started simultaneously. The top
value for the down-counter must be written to CMU_CALCNT before calibration is started. The down-counter counts for CMU_CALCNT
+1 cycles. When the down-counter has reached 0, the up-counter is sampled and the CALRDY interrupt flag is set. If CONT in
CMU_CALCTRL is cleared, the counters are stopped after finishing the ongoing calibration. If continuous mode is selected by setting
CONT in CMU_CALCTRL the down-counter reloads the top value and continues counting and the up-counter restarts from 0. Software
can then read out the sampled up-counter value from CMU_CALCNT. The up-counter has counted (the sampled value)+1 cycles. The
ratio between the reference and the oscillator subject to the calibration can easily be found using top+1 and sample+1. Overflows of the
up-counter will not occur. If the up-counter reaches its top value before the down-counter reaches 0, the up-counter stays at its top
value. Calibration can be stopped by writing CALSTOP in CMU_CMD. With this HW support, it is simple to write efficient calibration
algorithms in software.
DOWNCLK Domain
CMU_CALCTRL.DOWNSEL
AUXHFRCO
HFRCO
LFRCO
HFXO
LFXO
PRS[PRSDOWNSEL]
(Default) HFCLK
UPCLK Domain
CMU_CALCTRL.UPSEL
AUXHFRCO
HFRCO
LFRCO
HFXO
LFXO
PRS[PRSUPSEL]
HFCLK Domain
The counter operation for single and continuous mode are shown in
11.15 Continuous Calibration (CONT=1) on page 301
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for an illustration of this circuit. The concept is to select a reference and compare the RC frequency with
DOWNCLK
20-bit down-counter
= 0 ?
SYNC
UPCLK
20-bit up-counter
Figure 11.13. HW-support for RC Oscillator Calibration
respectively.
Figure 11.13 HW-support for RC Oscil-
Reload down-counter with
top value in continuous
mode.
TOP
Take snapshot of up-counter
in up-counter bufffer. If in
continuous mode, restart up-
counter from 0.
20-bit up-counter
buffer
SYNC
CMU_CALCNT
Figure 11.14 Single Calibration (CONT=0) on page 301
Reference Manual
CMU - Clock Management Unit
Write top-value using
CMU_CALCNT before
starting calibration.
SYNC
Set CMU_IF.CALRDY
and Figure
Rev. 1.1 | 300