Msc_Ifc - Interrupt Flag Clear Register - Silicon Laboratories EFR32xG14 Wireless Gecko Reference Manual

7.5.10 MSC_IFC - Interrupt Flag Clear Register

Offset
0x038
Reset
Access
Name
Bit Name
31:9 Reserved
8 LVEWRITE
Write 1 to clear the LVEWRITE interrupt flag. Reading returns the value of the IF and clears the corresponding interrupt
flags (This feature must be enabled globally in MSC.).
7 Reserved
6 WDATAOV
Write 1 to clear the WDATAOV interrupt flag. Reading returns the value of the IF and clears the corresponding interrupt
flags (This feature must be enabled globally in MSC.).
5 ICACHERR
Write 1 to clear the ICACHERR interrupt flag. Reading returns the value of the IF and clears the corresponding interrupt
flags (This feature must be enabled globally in MSC.).
4 PWRUPF
Write 1 to clear the PWRUPF interrupt flag. Reading returns the value of the IF and clears the corresponding interrupt flags
(This feature must be enabled globally in MSC.).
3 CMOF
Write 1 to clear the CMOF interrupt flag. Reading returns the value of the IF and clears the corresponding interrupt flags
(This feature must be enabled globally in MSC.).
2 CHOF
Write 1 to clear the CHOF interrupt flag. Reading returns the value of the IF and clears the corresponding interrupt flags
(This feature must be enabled globally in MSC.).
1 WRITE
Write 1 to clear the WRITE interrupt flag. Reading returns the value of the IF and clears the corresponding interrupt flags
(This feature must be enabled globally in MSC.).
0 ERASE
Write 1 to clear the ERASE interrupt flag. Reading returns the value of the IF and clears the corresponding interrupt flags
(This feature must be enabled globally in MSC.).
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Reset Access Description
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0 (R)W1 Clear LVEWRITE Interrupt Flag
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0 (R)W1 Clear WDATAOV Interrupt Flag
0 (R)W1 Clear ICACHERR Interrupt Flag
0 (R)W1 Clear PWRUPF Interrupt Flag
0 (R)W1 Clear CMOF Interrupt Flag
0 (R)W1 Clear CHOF Interrupt Flag
0 (R)W1 Clear WRITE Interrupt Flag
0 (R)W1 Clear ERASE Interrupt Flag
Bit Position
Reference Manual
MSC - Memory System Controller
1.2 Conven-
1.2 Conven-
Rev. 1.1 | 143