11.5.16 CMU_LFACLKSEL - Low Frequency A Clock Select Register
Offset
0x080
Reset
Access
Name
Bit
Name
31:3
Reserved
2:0
LFA
Selects the clock source for LFACLK.
Value
0
1
2
4
11.5.17 CMU_LFBCLKSEL - Low Frequency B Clock Select Register
Offset
0x084
Reset
Access
Name
Bit
Name
31:3
Reserved
2:0
LFB
Selects the clock source for LFBCLK.
Value
0
1
2
3
4
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Reset
Access
Description
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0x0
RW
Clock Select for LFA
Mode
Description
DISABLED
LFACLK is disabled
LFRCO
LFRCO selected as LFACLK
LFXO
LFXO selected as LFACLK
ULFRCO
ULFRCO selected as LFACLK
Reset
Access
Description
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0x0
RW
Clock Select for LFB
Mode
Description
DISABLED
LFBCLK is disabled
LFRCO
LFRCO selected as LFBCLK
LFXO
LFXO selected as LFBCLK
HFCLKLE
HFCLK divided by two/four is selected as LFBCLK
ULFRCO
ULFRCO selected as LFBCLK
Bit Position
Bit Position
Reference Manual
CMU - Clock Management Unit
1.2 Conven-
1.2 Conven-
Rev. 1.1 | 330
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