Rmu_Cmd - Command Register; Rmu_Rst - Reset Control Register - Silicon Laboratories EFR32xG14 Wireless Gecko Reference Manual

Bit Name
0 PORST
Set if a power on reset has been performed. Must be cleared by software. See
pretation on page 202

9.5.3 RMU_CMD - Command Register

Offset
0x008
Reset
Access
Name
Bit Name
31:1 Reserved
0 RCCLR
Set this bit to clear the RSTCAUSE register.

9.5.4 RMU_RST - Reset Control Register

Offset
0x00C
Reset
Access
Name
Bit Name
31:0 Reserved
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Reset Access Description
0 R Power on Reset
for details on how to interpret this bit.
Reset Access Description
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0 W1 Reset Cause Clear
Reset Access Description
To ensure compatibility with future devices, always write bits to 0. More information in
tions
Table 9.2 RMU Reset Cause Register Inter-
Bit Position
Bit Position
Reference Manual
RMU - Reset Management Unit
1.2 Conven-
1.2 Conven-
Rev. 1.1 | 210