10.5.14 EMU_PWRCTRL - Power Control Register
Offset
0x03C
Reset
Access
Name
Bit
Name
31:14
Reserved
13
IMMEDIATEPWRS-
WITCH
When set, allows immediate ANASW/REGPWRSEL switching. When cleared, Hardware protects switching of ANASW/
REGPWRSEL and switching is applied by hardware only when DCDC is stable
12:11
Reserved
10
REGPWRSEL
Determines the power supply input used by the Digital LDO. Firmware should select DVDD as the input after startup. If
DCDC is not configured to drive DVDD, IMMEDIATEPWRSWITCH needs to be set to prior to setting this bit to immediately
make the switch. If DCDC is configured to drive DVDD, hardware will make the switch to DVDD only when DCDC is stable
Value
0
1
9:6
Reserved
5
ANASW
Determines the power supply routed to the analog supply (VDDX_ANA) used by the analog peripherals (e.g., ULFRCO,
LFRCO, LFXO, HFRCO, AUXHFRCO, VMON, IDAC, and ADC). Reset with POR, Hard Pin Reset, or BOD Reset. If DCDC
is not configured to drive DVDD, IMMEDIATEPWRSWITCH needs to be set to prior to setting this bit to immediately make
the switch. If DCDC is configured to drive DVDD, hardware will make the switch to DVDD only when DCDC is stable
Value
0
1
4:0
Reserved
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Reset
Access
Description
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0
RW
Allows Immediate Switching of ANASW and REGPWRSEL Bit-
fields
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0
RW
This Field Selects the Input Supply Pin for the Digital LDO
Mode
Description
AVDD
The AVDD pin is the supply for the digital LDO. LDO current is limited
to 20 mA in this configuration.
DVDD
The DVDD pin is the supply for the digital LDO. Firmware should set
REGPWRSEL=1 after startup, before increasing the core clock fre-
quency.
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0
RW
Analog Switch Selection
Mode
Description
AVDD
Select AVDD as the analog power supply
DVDD
Select DVDD as the analog power supply
To ensure compatibility with future devices, always write bits to 0. More information in
tions
Bit Position
Reference Manual
EMU - Energy Management Unit
1.2 Conven-
1.2 Conven-
1.2 Conven-
1.2 Conven-
Rev. 1.1 | 255
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