Silicon Laboratories EFR32xG14 Wireless Gecko Reference Manual page 341

Bit Name
10 HFXOPEAKDETERR 0
Write 1 to clear the HFXOPEAKDETERR interrupt flag. Reading returns the value of the IF and clears the corresponding
interrupt flags (This feature must be enabled globally in MSC.).
9 HFXOAUTOSW
Write 1 to clear the HFXOAUTOSW interrupt flag. Reading returns the value of the IF and clears the corresponding inter-
rupt flags (This feature must be enabled globally in MSC.).
8 HFXODISERR
Write 1 to clear the HFXODISERR interrupt flag. Reading returns the value of the IF and clears the corresponding interrupt
flags (This feature must be enabled globally in MSC.).
7 Reserved
6 CALOF
Write 1 to clear the CALOF interrupt flag. Reading returns the value of the IF and clears the corresponding interrupt flags
(This feature must be enabled globally in MSC.).
5 CALRDY
Write 1 to clear the CALRDY interrupt flag. Reading returns the value of the IF and clears the corresponding interrupt flags
(This feature must be enabled globally in MSC.).
4 AUXHFRCORDY
Write 1 to clear the AUXHFRCORDY interrupt flag. Reading returns the value of the IF and clears the corresponding inter-
rupt flags (This feature must be enabled globally in MSC.).
3 LFXORDY
Write 1 to clear the LFXORDY interrupt flag. Reading returns the value of the IF and clears the corresponding interrupt
flags (This feature must be enabled globally in MSC.).
2 LFRCORDY
Write 1 to clear the LFRCORDY interrupt flag. Reading returns the value of the IF and clears the corresponding interrupt
flags (This feature must be enabled globally in MSC.).
1 HFXORDY
Write 1 to clear the HFXORDY interrupt flag. Reading returns the value of the IF and clears the corresponding interrupt
flags (This feature must be enabled globally in MSC.).
0 HFRCORDY
Write 1 to clear the HFRCORDY interrupt flag. Reading returns the value of the IF and clears the corresponding interrupt
flags (This feature must be enabled globally in MSC.).
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Reset Access Description
(R)W1 Clear HFXOPEAKDETERR Interrupt Flag
0 (R)W1 Clear HFXOAUTOSW Interrupt Flag
0 (R)W1 Clear HFXODISERR Interrupt Flag
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0 (R)W1 Clear CALOF Interrupt Flag
0 (R)W1 Clear CALRDY Interrupt Flag
0 (R)W1 Clear AUXHFRCORDY Interrupt Flag
0 (R)W1 Clear LFXORDY Interrupt Flag
0 (R)W1 Clear LFRCORDY Interrupt Flag
0 (R)W1 Clear HFXORDY Interrupt Flag
0 (R)W1 Clear HFRCORDY Interrupt Flag
Reference Manual
CMU - Clock Management Unit
1.2 Conven-
Rev. 1.1 | 341