Gcm And Gmac - Silicon Laboratories EFR32xG14 Wireless Gecko Reference Manual

31.4.7 GCM and GMAC

CRYPTO implements support for Galois/Counter Mode (GCM), and also Galois Message Authentication Code (GMAC), by providing
AES instructions and allowing multiplication on the field GF(2^128) defined by the polynomial x^128 + x^7 + x^2 + x + 1.
Note: BBSWAP128 needs to be applied to both operands and the result of the MMUL instruction when using it for GCM and GMAC
Efficient sequencer programs can be set up to perform GCM authentication and encryption/decryption on data from either BUFC, DMA,
or CPU. To achieve a single-pass solution, LENGTHA in CRYPTO_SEQCTRL is set to the length of the authentication part, and
LENGTHB is set to the length of the rest of the message. Conditional instructions can then be used to make sure the two parts of the
message are processed correctly. A similar approach is used to implement CCM.
31.4.8 DMA
The CRYPTO module has 5 DMA request signals (see
DMA0 and DMA1. These DMA channels are not associated with channel 0 and 1 of the system DMA, and any system DMA channel
can serve any of the 5 DMA requests. See the DMA chapter for information on how to configure the system DMA.
The DMA signals are set through the use of DMA oriented instructions, and cleared by reading or writing the respective CRYPTO data
registers.
Name Set on
DMA0WR Instruction DMA0TODATA, and DMA0TODATAXOR if
COMBDMA0WEREQ in CRYPTO_CTRL is set
DMA0XORWR Instruction DMA0TODATAXOR
DMA0RD Instructions DATATODMA0
DMA1WR Instructions DMA1TODATA
DMA1RD Instructions DATATODMA1
Note: DMAxRSEL in CRYPTO_CTRL has to be set to the data registers that are to be read using the respective DMA channels on a
DATATODMAx instruction. As an important note, DMAxRSEL in CRYPTO_CTRL selects what is read from any of the selectable read
registers during an ongoing DATATODMAx transfer .
When a DMA oriented CRYPTO instruction is used (either through a STEP in a Sequence or through CRYPTO_CMD), the correspond-
ing DMA signal is set. The instruction is complete when the entire source/destination is read/written (e.g. if DMA0TODATA is used, the
operation is complete when a total of 128 valid bits have been written through the CRYPTO_DATA0 register). DMAACTIVE in CRYP-
TO_STATUS is set while CRYPTO is working on a DMA-related instruction, e.g. waiting for the DMA to read or write data to CRYPTO
(see 31.4.8.1 DMA Initial Bytes
Normally, when a sequence or instruction is executed, access to most CRYPTO registers will stall the CPU or DMA that is trying to
access CRYPTO until the operation is done, preventing accesses to CRYPTO that could potentially interfere with an operation. During
DMA operations, all non-DMA registers are writeable and readable, but progress through the DMA operation will only be tracked with
the registers targeted by the DMA operation (i.e., if the DMA operation is supposed to transfer 3 words to DATA0, the DMA can first
choose to transfer data to e.g. DATA3, and then fulfill the transfer to DATA0).
Because the bus interface to CRYPTO is normally locked outside of DMA transfers, a wrongly set up DMA transfer (e.g., transferring
one byte too many) may lock up the interface.. One way to assist in debugging such issues can be setting NOBUSYSTALL in CRYP-
TO_CTRL. This will prevent any stall on CRYPTO register accesses during sequences and instructions. Use this option with care, as
modifying a register that is being used by CRYPTO can lead to undefined behavior.
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Table 31.8 DMA Signals on page
Table 31.8. DMA Signals
Skip).
CRYPTO - Crypto Accelerator
1038) split over 2 internal DMA channels:
Cleared on
Full CRYPTO_DATA0, CRYPTO_DDATA0, CRYP-
TO_DDATA0BIG or CRYPTO_QDATA0 write, or CRYP-
TO_DDATA0XOR if COMBDMA0WEDMAREQ in
CRYPTO_CTRL is set
Full CRYPTO_DATA0XOR write
Full CRYPTO_DATA0, CRYPTO_DDATA0, CRYP-
TO_DDATA0BIG or CRYPTO_QDATA0 read, depending
on DMA0MODE in CRYPTO_CTRL
Full CRYPTO_DATA1, CRYPTO_DDATA1, CRYP-
TO_QDATA1 or CRYPTO_QDATA1BIG write
Full CRYPTO_DATA1, CRYPTO_DDATA1, CRYP-
TO_QDATA1 or CRYPTO_QDATA1BIG read, depending
on DMA1MODE in CRYPTO_CTRL
Reference Manual
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