Cmu_Ien - Interrupt Enable Register - Silicon Laboratories EFR32xG14 Wireless Gecko Reference Manual

11.5.25 CMU_IEN - Interrupt Enable Register

Offset
0x0AC
Reset
Access
Name
Bit Name
31 CMUERR
Enable/disable the CMUERR interrupt
30 Reserved
29 ULFRCOEDGE
Enable/disable the ULFRCOEDGE interrupt
28 LFRCOEDGE
Enable/disable the LFRCOEDGE interrupt
27 LFXOEDGE
Enable/disable the LFXOEDGE interrupt
26:15 Reserved
14 LFTIMEOUTERR
Enable/disable the LFTIMEOUTERR interrupt
13 HFRCODIS
Enable/disable the HFRCODIS interrupt
12 HFXOSHUNTOPTR-
DY
Enable/disable the HFXOSHUNTOPTRDY interrupt
11 HFXOPEAKDETRDY 0
Enable/disable the HFXOPEAKDETRDY interrupt
10 HFXOPEAKDETERR 0
Enable/disable the HFXOPEAKDETERR interrupt
9 HFXOAUTOSW
Enable/disable the HFXOAUTOSW interrupt
8 HFXODISERR
Enable/disable the HFXODISERR interrupt
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Reset Access Description
0 RW CMUERR Interrupt Enable
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0 RW ULFRCOEDGE Interrupt Enable
0 RW LFRCOEDGE Interrupt Enable
0 RW LFXOEDGE Interrupt Enable
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0 RW LFTIMEOUTERR Interrupt Enable
0 RW HFRCODIS Interrupt Enable
0 RW HFXOSHUNTOPTRDY Interrupt Enable
RW HFXOPEAKDETRDY Interrupt Enable
RW HFXOPEAKDETERR Interrupt Enable
0 RW HFXOAUTOSW Interrupt Enable
0 RW HFXODISERR Interrupt Enable
Bit Position
Reference Manual
CMU - Clock Management Unit
1.2 Conven-
1.2 Conven-
Rev. 1.1 | 342