Silicon Laboratories EFR32xG14 Wireless Gecko Reference Manual page 918

Bit Name
6 APORT3XMASTER-
DIS
Determines if the ADC will request this APORT bus (if selected by POSSEL or NEGSEL or SCANINPUTSEL). When 1,
ADC only passively monitors the APORT bus and the selection of the channel for the selected bus is ignored. The channel
selection is done by the device that masters the APORT bus. This bit allows multiple APORT connected devices to monitor
the same APORT bus simultaneously.
Value
0
1
5 APORT2YMASTER-
DIS
Determines if the ADC will request this APORT bus (if selected by POSSEL or NEGSEL or SCANINPUTSEL). When 1,
ADC only passively monitors the APORT bus and the selection of the channel for the selected bus is ignored. The channel
selection is done by the device that masters the APORT bus. This bit allows multiple APORT connected devices to monitor
the same APORT bus simultaneously.
Value
0
1
4 APORT2XMASTER-
DIS
Determines if the ADC will request this APORT bus (if selected by POSSEL or NEGSEL or SCANINPUTSEL). When 1,
ADC only passively monitors the APORT bus and the selection of the channel for the selected bus is ignored. The channel
selection is done by the device that masters the APORT bus. This bit allows multiple APORT connected devices to monitor
the same APORT bus simultaneously.
Value
0
1
3 APORT1YMASTER-
DIS
Determines if the ADC will request this APORT bus (if selected by POSSEL or NEGSEL or SCANINPUTSEL). When 1,
ADC only passively monitors the APORT bus and the selection of the channel for the selected bus is ignored. The channel
selection is done by the device that masters the APORT bus. This bit allows multiple APORT connected devices to monitor
the same APORT bus simultaneously.
Value
0
1
2 APORT1XMASTER-
DIS
Determines if the ADC will request this APORT bus (if selected by POSSEL or NEGSEL or SCANINPUTSEL). When 1,
ADC only passively monitors the APORT bus and the selection of the channel for the selected bus is ignored. The channel
selection is done by the device that masters the APORT bus. This bit allows multiple APORT connected devices to monitor
the same APORT bus simultaneously.
Value
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Reset Access Description
0 RW APORT3X Master Disable
Description
APORT mastering enabled
APORT mastering disabled
0 RW APORT2Y Master Disable
Description
APORT mastering enabled
APORT mastering disabled
0 RW APORT2X Master Disable
Description
APORT mastering enabled
APORT mastering disabled
0 RW APORT1Y Master Disable
Description
APORT mastering enabled
APORT mastering disabled
0 RW APORT1X Master Disable
Description
Reference Manual
ADC - Analog to Digital Converter
Rev. 1.1 | 918