Interrupts And Prs Output - Silicon Laboratories EFR32xG14 Wireless Gecko Reference Manual

Reference Manual
OPAMP - Operational Amplifier
24.3.1.10 Offset Calibration
Each opamp has a calibration register, VDACn_OPAx_CAL, where calibration values for both offset and gain correction can be written.
The required calibration settings depend on the chosen DRIVESTRENGTH. The default calibration settings stored in
VDACn_OPAx_CAL are for DRIVESTRENGTH=2. If an opamp is being reconfigured, the required calibration settings for DRIVES-
TRENGTH=n can be found in DEVINFO_OPAxCALn. Offsets can be programmed through the OFFSETP and OFFSETN bitfields of
VDACn_OPAx_CAL.
24.3.1.11 Disabling of Rail-to-Rail Operation
Each opamp can have its input rail-to-rail stage disabled by setting the HCMDIS in VDACn_OPAx_CTRL. Disabling the rail-to-rail input
stage improves linearity of the opamp, thus improving the total harmonic distortion (THD) at the cost of reduced input signal swing.
24.3.1.12 Unity Gain Bandwidth Scaling
Unity gain bandwidth of an opamp can be scaled setting the INCBW bit in VDACn_OPAx_CTRL. Note that this setting is used only
when closed loop gain is greater than 3X. With this setting is enabled, the opamp is not unity gain stable.
24.3.1.13 Opamp Output Scaling
Opamp output drive strength is scaled by one half when the OUTSCALE bit in VDACn_OPAx_CTRL is set.

24.3.2 Interrupts and PRS Output

Each opamp has an interrupt flag OPAxOUTVALID in VDACn_IF that is set when the output is settled externally at the load. An interrupt
will be requested if the OPAxOUTVALID interrupt flag in VDACn_IF is set and enabled by the OPAxOUTVALID bit in VDACn_IEN.
The OPAxERRPRSMODE interrupt flag in VDACn_IF indicates a protocol error when the opamp is triggered in PRS TIMED mode. This
flag is set if the negative edge of the PRS pulse came before the output to opamp is valid. The interrupt flag is enabled by the OPAx-
ERRPRSMODE bit in VDACn_IEN.
An interrupt can also be requested when an APORT bus conflict occurs if the OPAxAPORTCONFLICT interrupt flag in VDACn_IF is set
and enabled through by the OPAxAPORTCONFLICT bit in VDACn_IEN.
One of two aynchronous PRS outputs can be enabled for each opamp by setting PRSOUTMODE in VDACn_OPAx_CTRL. If PRSOUT-
MODE is WARM, opamp warm-up status is available. If PRSOUTMODE is OUTVALID, opamp output valid status is available.
24.3.3 APORT Request and Conflict Status
The opamps are connected to pins through the APORT system. To help debug over-utilization of APORT resources, the opamps pro-
vide request and conflict status information. The request status of APORT buses is visible through the DACn_OPAx_APORTREQ regis-
ter.
If an APORT bus conflict occurs, it is reported in the DACn_OPAx_APORTCONFLICT register. An APORT conflict occurs if an opamp
requests the same bus at the same time as another analog peripheral. In addition an APORT conflict is reported if any two of NEGSEL,
POSSEL or APORTOUTSEL are configured to request the same APORT bus.
It is possible for the opamps to passively monitor APORT buses without controlling the switches and creating bus conflicts. This can be
done by setting APORTXMASTERDIS or APORTYMASTERDIS in the DACn_OPAx_CTRL register.
24.3.4 Opamp Modes
The opamps can perform several different functions by configuring the internal signal routing between the opamps. The modes availa-
ble are described in the following sections.
24.3.4.1 General Opamp Mode
In this mode, the resistor ladder is isolated from the feedback path, and the input signal routing is defined by POSSEL and NEGSEL in
VDACn_OPAx_MUX. The output signal routing is defined by the setting of VDACn_OPAx_OUT.
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