Usartn_Ifc - Interrupt Flag Clear Register - Silicon Laboratories EFR32xG14 Wireless Gecko Reference Manual

18.5.19 USARTn_IFC - Interrupt Flag Clear Register

Offset
0x048
Reset
Access
Name
Bit Name
31:17 Reserved
16 TCMP2
Write 1 to clear the TCMP2 interrupt flag. Reading returns the value of the IF and clears the corresponding interrupt flags
(This feature must be enabled globally in MSC.).
15 TCMP1
Write 1 to clear the TCMP1 interrupt flag. Reading returns the value of the IF and clears the corresponding interrupt flags
(This feature must be enabled globally in MSC.).
14 TCMP0
Write 1 to clear the TCMP0 interrupt flag. Reading returns the value of the IF and clears the corresponding interrupt flags
(This feature must be enabled globally in MSC.).
13 TXIDLE
Write 1 to clear the TXIDLE interrupt flag. Reading returns the value of the IF and clears the corresponding interrupt flags
(This feature must be enabled globally in MSC.).
12 CCF
Write 1 to clear the CCF interrupt flag. Reading returns the value of the IF and clears the corresponding interrupt flags (This
feature must be enabled globally in MSC.).
11 SSM
Write 1 to clear the SSM interrupt flag. Reading returns the value of the IF and clears the corresponding interrupt flags (This
feature must be enabled globally in MSC.).
10 MPAF
Write 1 to clear the MPAF interrupt flag. Reading returns the value of the IF and clears the corresponding interrupt flags
(This feature must be enabled globally in MSC.).
9 FERR
Write 1 to clear the FERR interrupt flag. Reading returns the value of the IF and clears the corresponding interrupt flags
(This feature must be enabled globally in MSC.).
8 PERR
Write 1 to clear the PERR interrupt flag. Reading returns the value of the IF and clears the corresponding interrupt flags
(This feature must be enabled globally in MSC.).
7 TXUF
Write 1 to clear the TXUF interrupt flag. Reading returns the value of the IF and clears the corresponding interrupt flags
(This feature must be enabled globally in MSC.).
silabs.com | Building a more connected world.
USART - Universal Synchronous Asynchronous Receiver/Transmitter
Reset Access Description
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0 (R)W1 Clear TCMP2 Interrupt Flag
0 (R)W1 Clear TCMP1 Interrupt Flag
0 (R)W1 Clear TCMP0 Interrupt Flag
0 (R)W1 Clear TXIDLE Interrupt Flag
0 (R)W1 Clear CCF Interrupt Flag
0 (R)W1 Clear SSM Interrupt Flag
0 (R)W1 Clear MPAF Interrupt Flag
0 (R)W1 Clear FERR Interrupt Flag
0 (R)W1 Clear PERR Interrupt Flag
0 (R)W1 Clear TXUF Interrupt Flag
Bit Position
Reference Manual
1.2 Conven-
Rev. 1.1 | 586